STRUCT REGMAP_IRQ_CHIP(9)
π struct regmap_irq_chip(9) β the kernel API manual, bestie edition
okay so. this is struct regmap_irq_chip(9) from the Kernel API Manual, and it's literally the blueprint for a generic regmap irq_chip. think of it as the main-character struct that tells the regmap-IRQ machinery everything it needs to know about your interrupt controller. let's get into it π
β¨ SYNOPSIS β¨
struct regmap_irq_chip {
const char *name;
const char *domain_suffix;
unsigned int main_status;
unsigned int num_main_status_bits;
const struct regmap_irq_sub_irq_map *sub_reg_offsets;
int num_main_regs;
unsigned int status_base;
unsigned int mask_base;
unsigned int unmask_base;
unsigned int ack_base;
unsigned int wake_base;
const unsigned int *config_base;
unsigned int irq_reg_stride;
unsigned int init_ack_masked:1;
unsigned int mask_unmask_non_inverted:1;
unsigned int use_ack:1;
unsigned int ack_invert:1;
unsigned int clear_ack:1;
unsigned int status_invert:1;
unsigned int status_is_level:1;
unsigned int wake_invert:1;
unsigned int type_in_mask:1;
unsigned int clear_on_unmask:1;
unsigned int runtime_pm:1;
unsigned int no_status:1;
int num_regs;
const struct regmap_irq *irqs;
int num_irqs;
int num_config_bases;
int num_config_regs;
int (*handle_pre_irq)(void *irq_drv_data);
int (*handle_post_irq)(void *irq_drv_data);
int (*handle_mask_sync)(int index, unsigned int mask_buf_def,
unsigned int mask_buf, void *irq_drv_data);
int (*set_type_config)(unsigned int **buf, unsigned int type, const
struct regmap_irq *irq_data, int idx, void *irq_drv_data);
unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
unsigned int base, int index);
int (*irq_reqres)(void *irq_drv_data, irq_hw_number_t hwirq);
void (*irq_relres)(void *irq_drv_data, irq_hw_number_t hwirq);
void *irq_drv_data;
};
π¦ MEMBERS π¦
nameβ the descriptive name for your IRQ controller. give it a cute one, it deserves it πdomain_suffixβ a name suffix that gets appended to the end of the IRQ domain name. you need this when multiple regmap-IRQ controllers are created from the same device (iykyk, can't have two domains with the same name, that's giving chaos).main_statusβ base main status register address. for chips that have interrupts arranged in separate sub-irq blocks with their own IRQ registers, plus a main IRQ register that flags which sub-irq blocks have unhandled interrupts. for those chips, you put the sub-irq register info instatus_base,mask_baseandack_base.num_main_status_bitsβ should be given to chips where the number of meaningfull main status bits differs fromnum_regs. (yes, "meaningfull", we keep it π)sub_reg_offsetsβ arrays of mappings from main register bits to sub irq registers. the first item in the array describes the registers for the first main status bit, the second array for the second bit, etc. the offset is given as the sub register status offset tostatus_base. should containnum_regsarrays. can be provided for chips with a more complex mapping than "1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ..." β you know the vibe.num_main_regsβ number of 'main status' irq registers, for chips that havemain_statusset.status_baseβ base status register address. the moment β¨mask_baseβ base mask register address. mask bits are set to1when an interrupt is masked,0when unmasked.unmask_baseβ base unmask register address. unmask bits are set to1when an interrupt is unmasked and0when masked. iconique.ack_baseβ base ack address. if zero, then the chip is clear on read. using a zero value is possible with theuse_ackbit.wake_baseβ base address for wake enables. if zero, unsupported πconfig_baseβ base address for IRQ type config regs. if null, unsupported.irq_reg_strideβ the stride to use for chips where registers are not contiguous.init_ack_maskedβ ack all masked interrupts once during initalization.mask_unmask_non_invertedβ controls mask bit inversion for chips that set bothmask_baseandunmask_base. if false, mask and unmask bits are inverted (which is deprecated behavior π¬); if true, bits will not be inverted and the registers keep their normal behavior. note that if you use only one ofmask_baseorunmask_base, this flag has no effect and is unnecessary. any new drivers that set bothmask_baseandunmask_baseshould set this to true to avoid relying on the deprecated behavior. do it. don't be that driver πuse_ackβ use the ack register even if it is zero.ack_invertβ inverted ack register: cleared bits for ack.clear_ackβ use this to set1and0or vice-versa to clear interrupts.status_invertβ inverted status register: cleared bits are active interrupts.status_is_levelβ the status register is actuall signal level: xor the status register with the previous value to get the active interrupts.wake_invertβ inverted wake register: cleared bits are wake disabled.type_in_maskβ use the mask registers for controlling irq type. use this if the hardware provides separate bits for rising/falling edge or low/high level interrupts and they should be combined into a single logical interrupt. usestruct regmap_irq_typedata to define the mask bit for each irq type.clear_on_unmaskβ for chips with interrupts cleared on read: read the status registers before unmasking interrupts, to clear any bits set when they were masked.runtime_pmβ hold a runtime PM lock on the device when accessing it. πno_statusβ no status register: all interrupts assumed generated by device.num_regsβ number of registers in each control bank.irqsβ descriptors for individual IRQs. interrupt numbers are assigned based on the index in the array of the interrupt.num_irqsβ number of descriptors.num_config_basesβ number of config base registers.num_config_regsβ number of config registers for each config base register.handle_pre_irqβ driver specific callback to handle an interrupt from the device beforeregmap_irq_handlerprocesses the interrupts.handle_post_irqβ driver specific callback to handle an interrupt from the device after handling the interrupts inregmap_irq_handler. bestie bookends π«Άhandle_mask_syncβ callback used to handle IRQ mask syncs. the index will be in the range[0, num_regs)set_type_configβ callback used for configuring irq types.get_irq_regβ callback for mapping(base register, index)pairs to register addresses. the base register will be one ofstatus_base,mask_base, etc.,main_status, or any ofconfig_base. the index will be in the range[0, num_main_regs[for the main status base,[0, num_config_regs[for any config register base, and[0, num_regs[for any other base. if unspecified thenregmap_irq_get_irq_reg_linearis used.irq_reqresβ callback function to request IRQ resources (may beNULL)irq_relresβ callback function to release IRQ resources (may beNULL)irq_drv_dataβ driver specific IRQ data which is passed as parameter when the driver specific pre/post interrupt handler is called.
πΈ DESCRIPTION πΈ
so this whole thing is not intended to handle every possible interrupt controller β but it should handle a substantial proportion of those that are found in the wild. no cap, it's a solid generalist π
β SEE ALSO β
kernel file ./include/linux/regmap.h β and then the whole extended fam: struct reg_default(9), struct reg_sequence(9), regmap_read_poll_timeout(9), regmap_read_poll_timeout_atomic(9), regmap_field_read_poll_timeout(9), struct regmap_range(9), struct regmap_access_table(9), struct regmap_config(9), struct regmap_range_cfg(9), struct regmap_sdw_mbq_cfg(9), struct regmap_bus(9), regmap_init(9), regmap_init_i2c(9), regmap_init_mdio(9), regmap_init_sccb(9), regmap_init_slimbus(9), regmap_init_spi(9), regmap_init_spmi_base(9), regmap_init_spmi_ext(9), regmap_init_w1(9), regmap_init_mmio_clk(9), regmap_init_mmio(9), regmap_init_ac97(9), regmap_init_sdw(9), regmap_init_sdw_mbq(9), regmap_init_sdw_mbq_cfg(9), regmap_init_i3c(9), regmap_init_spi_avmm(9), regmap_init_fsi(9), devm_regmap_init(9), devm_regmap_init_i2c(9), devm_regmap_init_mdio(9), devm_regmap_init_sccb(9), devm_regmap_init_spi(9), devm_regmap_init_spmi_base(9), devm_regmap_init_spmi_ext(9), devm_regmap_init_w1(9), devm_regmap_init_mmio_clk(9), devm_regmap_init_mmio(9), devm_regmap_init_ac97(9), devm_regmap_init_sdw(9), devm_regmap_init_sdw_mbq(9), devm_regmap_init_sdw_mbq_cfg(9), devm_regmap_init_slimbus(9), devm_regmap_init_i3c(9), devm_regmap_init_spi_avmm(9), devm_regmap_init_fsi(9), struct reg_field(9), struct regmap_irq_type(9), struct regmap_irq(9) π
that's the whole page, bestie, you ate it π
this one lives in ./include/linux and it's dated October 2026 β struct regmap_irq_chip(9), out π«Άβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms