STRUCT R9A06G032_CLKDESC(9)

💖 struct r9a06g032_clkdesc(9) 💖

okay so bestie, buckle up — this is a page straight out of the Kernel API Manual, and it's literally the blueprint for one (1) clock. slay. ✨

---

🌸 NAME 🌸

struct r9a06g032_clkdesc — describe a single clock 🕐💅

---

🎀 SYNOPSIS 🎀

struct r9a06g032_clkdesc {
    const char *name;
    uint32_t managed:1;
    enum gate_type type:3;
    uint32_t index:8;
    uint32_t source:8;
    union {
      struct r9a06g032_gate gate;
      struct {
        unsigned int min:10, max:10, reg:10;
        u16 table[4];
      } div;
      struct {
        u16 div, mul;
      } ffc;
      struct {
        uint16_t group:1;
        struct regbit sel, g1, r1, g2, r2;
      } dual;
    };
 };

no cap, look at all those bitfields — she's compact and she knows it 💅

---

🦋 Members 🦋

• name — the string describing this clock, like her little name tag 🏷️
• managed — boolean indicating if this clock should be started/stopped as part of power management ⚡ (yes she's on the PM grind)
• type — see enum gate_type 👀
• index — the ID of this clock element 🔢
• source — the ID+1 of the parent clock element. Root clock uses ID of ~0 (PARENT_ID); 🌳
• {unnamed_union} — anonymous, mysterious, main character energy 🫶
• gate — clock enable/disable 🚦
• div — substructure for clock divider ➗
• div.min — smallest permitted clock divider 🐜
• div.max — largest permitted clock divider 🐘
• div.reg — clock divider register offset, in 32-bit words 📍
• div.table — optional list of fixed clock divider values; must be in ascending order, zero for unused 📈 (fr fr, ascending or it's a vibe violation)
• ffc — substructure for fixed-factor clocks 🧮
• ffc.div — divisor for fixed-factor clock ➗
• ffc.mul — multiplier for fixed-factor clock ✖️
• dual — substructure for dual clock gates 👯
• dual.group — UART group, 0=UART0/1/2, 1=UART3/4/5/6/7 📟
• dual.sel — select either g1/r1 or g2/r2 as clock source 🎚️
• dual.g1 — 1st source gate (clock enable/disable) 1️⃣
• dual.r1 — 1st source reset (module reset) 🔁
• dual.g2 — 2nd source gate (clock enable/disable) 2️⃣
• dual.r2 — 2nd source reset (module reset) 🔂

---

⭐ Description ⭐

Describes a single element in the clock tree hierarchy. 🌲 And ngl, because there are quite a large number of clock elements, this structure is packed tightly to conserve space — she is SNUG. every bit is doing its job, no wasted room, iconic 💀✨

---

💜 SEE ALSO 💜

Kernel file ./drivers/clk/renesas/r9a06g032-clocks.c, struct regbit(9), struct r9a06g032_gate(9) 🫶

---

and that's the tea bestie 🍓 this lil page came from ./drivers/clk/renesas, dated October 2026, and she's officially titled struct r9a06g032_clkdesc(9) — go off queen 👑💖