STRUCT QUICKI2C_SUBIP_ACPI_CONFIG(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– struct quicki2c_subip_acpi_config πŸ’–

okay so this is a page from the Kernel API Manual, and it's all about struct quicki2c_subip_acpi_config β€” the QuickI2C ACPI DSD parameters ✨ bestie, it's literally the vibe-check sheet for I2C timing.


🌸 NAME 🌸

struct quicki2c_subip_acpi_config β€” QuickI2C ACPI DSD parameters πŸŽ€


πŸ¦‹ SYNOPSIS πŸ¦‹

struct quicki2c_subip_acpi_config {
    u64 SMHX;
    u64 SMLX;
    u64 SMTD;
    u64 SMRD;
    u64 FMHX;
    u64 FMLX;
    u64 FMTD;
    u64 FMRD;
    u64 FMSL;
    u64 FPHX;
    u64 FPLX;
    u64 FPTD;
    u64 FPRD;
    u64 HMHX;
    u64 HMLX;
    u64 HMTD;
    u64 HMRD;
    u64 HMSL;
    u64 FSEN;
    u64 FSVL;
    u64 INDE;
    u64 INDV;
    u8 reserved;
 };

πŸ’… Members πŸ’…

like, every single one of these is a u64 except the last one, and every one of them matters. no skipping. 🫢

  • SMHX β€” Standard Mode (100 kbit/s) Serial Clock Line HIGH Period ⏰
  • SMLX β€” Standard Mode (100 kbit/s) Serial Clock Line LOW Period
  • SMTD β€” Standard Mode (100 kbit/s) Serial Data Line Transmit Hold Period
  • SMRD β€” Standard Mode (100 kbit/s) Serial Data Receive Hold Period
  • FMHX β€” Fast Mode (400 kbit/s) Serial Clock Line HIGH Period
  • FMLX β€” Fast Mode (400 kbit/s) Serial Clock Line LOW Period
  • FMTD β€” Fast Mode (400 kbit/s) Serial Data Line Transmit Hold Period
  • FMRD β€” Fast Mode (400 kbit/s) Serial Data Line Receive Hold Period
  • FMSL β€” Maximum length (in ic_clk_cycles) of suppressed spikes in Standard Mode, Fast Mode and Fast Mode Plus πŸ¦”
  • FPHX β€” Fast Mode Plus (1Mbit/sec) Serial Clock Line HIGH Period πŸ”₯
  • FPLX β€” Fast Mode Plus (1Mbit/sec) Serial Clock Line LOW Period
  • FPTD β€” Fast Mode Plus (1Mbit/sec) Serial Data Line Transmit HOLD Period
  • FPRD β€” Fast Mode Plus (1Mbit/sec) Serial Data Line Receive HOLD Period
  • HMHX β€” High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line HIGH Period ⚑
  • HMLX β€” High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line LOW Period
  • HMTD β€” High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Transmit HOLD Period
  • HMRD β€” High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Receive HOLD Period
  • HMSL β€” Maximum length (in ic_clk_cycles) of suppressed spikes in High Speed Mode πŸ¦”
  • FSEN β€” Maximum Frame Size Feature Enable Control
  • FSVL β€” Maximum Frame Size Value (unit in Bytes)
  • INDE β€” Interrupt Delay Feature Enable Control
  • INDV β€” Interrupt Delay Value (unit in 10 us) ⏱️
  • reserved β€” a u8, just sitting there being reserved. iconic of it honestly. πŸ™ˆ

✨ Description ✨

So basically: those properties get from QUICKI2C_ACPI_METHOD_NAME_ISUB method, and they're used for I2C timing configure. that's the whole thing, and it's lowkey important β€” this is where your timings come from, no cap. πŸ’œ


πŸ‘‘ SEE ALSO πŸ‘‘

  • Kernel file ./drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
  • struct quicki2c_subip_acpi_parameter(9)
  • struct quicki2c_ddata(9)
  • struct quicki2c_device(9)

go read those next, bestie, iykyk 🧚


fr fr that's the whole page β€” nothing skipped, nothing invented, every flag and number exactly where it belongs. slay. πŸ’€

and that's a wrap! 🌈 this one came from ./drivers/hid/intel-thc-hid/in... and it's dated October 2026 β€” mwah, periodt. πŸ“πŸŽ€

πŸ“¦ where this page comes from