STRUCT QCOM_PCIE_EP(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct qcom_pcie_ep(9)

okay so bestie, welcome to the Kernel API Manual β€” yes, that's the manual name, we're being fancy today ✨ β€” and today's main character is the Qualcomm PCIe Endpoint Controller. no cap, this struct is lowkey the whole personality of pcie-qcom-ep.c. let's get into it 🫢


🌸 NAME 🌸

struct qcom_pcie_ep β€” the Qualcomm PCIe Endpoint Controller. that's it, that's the vibe. πŸ‘‘


πŸŽ€ SYNOPSIS πŸŽ€

here's the exact shape of it, character for character, don't touch a thing:

struct qcom_pcie_ep {
    struct dw_pcie pci;
    void __iomem *parf;
    void __iomem *mmio;
    struct regmap *perst_map;
    struct resource *mmio_res;
    struct reset_control *core_reset;
    struct gpio_desc *reset;
    struct gpio_desc *wake;
    struct phy *phy;
    struct dentry *debugfs;
    struct icc_path *icc_mem;
    struct clk_bulk_data *clks;
    int num_clks;
    u32 perst_en;
    u32 perst_sep_en;
    const struct qcom_pcie_ep_cfg *cfg;
    enum qcom_pcie_ep_link_status link_status;
    int global_irq;
    int perst_irq;
 };

✨ Members ✨

okay this is the fun part, meet the whole cast 🎬 every single one of them, no skipping:

  • pci β€” the Designware PCIe controller struct. the blueprint bestie. πŸ—οΈ
  • parf β€” Qualcomm PCIe specific PARF register base. very on-brand, very Qualcomm. πŸ’œ
  • mmio β€” MMIO register base. the classic. πŸŽ€
  • perst_map β€” the PERST regmap. πŸ—ΊοΈ
  • mmio_res β€” MMIO region resource. it's giving "the actual memory real estate". 🏠
  • core_reset β€” PCIe Endpoint core reset. hitting refresh on the whole thing. πŸ”„
  • reset β€” the PERST# GPIO. ⚑
  • wake β€” the WAKE# GPIO. rise and shine, king. β˜€οΈ
  • phy β€” PHY controller block. the physical layer, the moment. 🧚
  • debugfs β€” the PCIe Endpoint Debugfs directory. for when you wanna snoop πŸ‘€
  • icc_mem β€” handle to an interconnect path between PCIe and MEM. the ~connection~ πŸ¦‹
  • clks β€” PCIe clocks. tick tock. ⏰
  • num_clks β€” PCIe clocks count. yes, we counted them. 🌈
  • perst_en β€” flag for PERST enable. 🚩
  • perst_sep_en β€” flag for PERST separation enable. the sequel flag. 🚩🚩
  • cfg β€” the PCIe EP config struct. πŸ› οΈ
  • link_status β€” PCIe Link status. are we linking or are we not linking, that is the question. πŸ”—
  • global_irq β€” Qualcomm PCIe specific Global IRQ. 🌍
  • perst_irq β€” the PERST# IRQ. ⚑ again but interrupt-flavoured.

πŸ”₯ SEE ALSO πŸ”₯

  • the kernel file ./drivers/pci/controller/dwc/pcie-qcom-ep.c
  • struct qcom_pcie_ep_cfg(9) β€” go read that one next, iykyk πŸ’…

and that's the whole page bestie, you ate that πŸ“ fr fr. this was live from ./drivers/pci/controller/dwc, dated October 2026 β€” slay, mwah πŸ’–

πŸ“¦ where this page comes from