STRUCT PPTABLE_FUNCS(9)
π struct pptable_funcs β Kernel API Manual β¨
okay bestie, welcome to the struct pptable_funcs(9) page π«Ά this is the callback squad used to talk to the SMU, and yes, there are so many of them. no cap, every single one is down below.
πΈ NAME
struct pptable_funcs β callbacks used to interact with the SMU. that's the whole vibe π
β¨ SYNOPSIS
struct pptable_funcs {
int (*run_btc)(struct smu_context *smu);
int (*init_allowed_features)(struct smu_context *smu);
enum amd_pm_state_type (*get_current_power_state)(struct smu_context
*smu);
int (*set_default_dpm_table)(struct smu_context *smu);
int (*populate_umd_state_clk)(struct smu_context *smu);
int (*emit_clk_levels)(struct smu_context *smu, enum smu_clk_type
clk_type, char *buf, int *offset);
int (*force_clk_levels)(struct smu_context *smu, enum smu_clk_type
clk_type, uint32_t mask);
int (*od_edit_dpm_table)(struct smu_context *smu, enum
PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size);
int (*restore_user_od_settings)(struct smu_context *smu);
int (*get_clock_by_type_with_latency)(struct smu_context *smu, enum
smu_clk_type clk_type, struct pp_clock_levels_with_latency *clocks);
int (*get_power_profile_mode)(struct smu_context *smu, char *buf);
int (*set_power_profile_mode)(struct smu_context *smu, u32
workload_mask, long *custom_params, u32 custom_params_max_idx);
int (*dpm_set_vcn_enable)(struct smu_context *smu, bool enable, int
inst);
int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
int (*set_gfx_power_up_by_imu)(struct smu_context *smu);
int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors
sensor, void *data, uint32_t *size);
int (*get_apu_thermal_limit)(struct smu_context *smu, uint32_t
*limit);
int (*set_apu_thermal_limit)(struct smu_context *smu, uint32_t
limit);
int (*pre_display_config_changed)(struct smu_context *smu);
int (*display_config_changed)(struct smu_context *smu);
int (*apply_clocks_adjust_rules)(struct smu_context *smu);
int (*notify_smc_display_config)(struct smu_context *smu);
bool (*is_dpm_running)(struct smu_context *smu);
int (*get_fan_speed_pwm)(struct smu_context *smu, uint32_t *speed);
int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
int (*set_watermarks_table)(struct smu_context *smu, struct
pp_smu_wm_range_sets *clock_ranges);
int (*get_thermal_temperature_range)(struct smu_context *smu, struct
smu_temperature_range *range);
int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t
*clocks_in_khz, uint32_t *num_states);
int (*set_default_od_settings)(struct smu_context *smu);
int (*set_performance_level)(struct smu_context *smu, enum
amd_dpm_forced_level level);
int (*display_disable_memory_clock_switch)(struct smu_context *smu,
bool disable_memory_clock_switch);
int (*get_ppt_limit)(struct smu_context *smu, enum
smu_ppt_limit_type limit_type, uint32_t *current_ppt_limit);
int (*set_df_cstate)(struct smu_context *smu, enum pp_df_cstate
state);
int (*update_pcie_parameters)(struct smu_context *smu, uint8_t
pcie_gen_cap, uint8_t pcie_width_cap);
int (*i2c_init)(struct smu_context *smu);
void (*i2c_fini)(struct smu_context *smu);
void (*get_unique_id)(struct smu_context *smu);
int (*get_dpm_clock_table)(struct smu_context *smu, struct
dpm_clocks *clock_table);
int (*init_microcode)(struct smu_context *smu);
int (*load_microcode)(struct smu_context *smu);
void (*fini_microcode)(struct smu_context *smu);
int (*init_smc_tables)(struct smu_context *smu);
int (*fini_smc_tables)(struct smu_context *smu);
int (*init_power)(struct smu_context *smu);
int (*fini_power)(struct smu_context *smu);
int (*check_fw_status)(struct smu_context *smu);
int (*set_mp1_state)(struct smu_context *smu, enum pp_mp1_state
mp1_state);
int (*setup_pptable)(struct smu_context *smu);
int (*get_vbios_bootup_values)(struct smu_context *smu);
int (*check_fw_version)(struct smu_context *smu);
int (*powergate_sdma)(struct smu_context *smu, bool gate);
int (*set_gfx_cgpg)(struct smu_context *smu, bool enable);
int (*write_pptable)(struct smu_context *smu);
int (*set_driver_table_location)(struct smu_context *smu);
int (*set_tool_table_location)(struct smu_context *smu);
int (*notify_memory_pool_location)(struct smu_context *smu);
int (*system_features_control)(struct smu_context *smu, bool en);
int (*init_display_count)(struct smu_context *smu, uint32_t count);
int (*set_allowed_mask)(struct smu_context *smu);
int (*get_enabled_mask)(struct smu_context *smu, struct
smu_feature_bits *feature_mask);
int (*feature_is_enabled)(struct smu_context *smu, enum
smu_feature_mask mask);
int (*disable_all_features_with_exception)(struct smu_context *smu,
enum smu_feature_mask mask);
int (*notify_display_change)(struct smu_context *smu);
int (*set_ppt_limit)(struct smu_context *smu, enum
smu_ppt_limit_type limit_type, uint32_t limit);
int (*init_max_sustainable_clocks)(struct smu_context *smu);
int (*enable_thermal_alert)(struct smu_context *smu);
int (*disable_thermal_alert)(struct smu_context *smu);
int (*set_min_dcef_deep_sleep)(struct smu_context *smu, uint32_t
clk);
int (*display_clock_voltage_request)(struct smu_context *smu, struct
pp_display_clock_request *clock_req);
uint32_t (*get_fan_control_mode)(struct smu_context *smu);
int (*set_fan_control_mode)(struct smu_context *smu, uint32_t mode);
int (*set_fan_speed_pwm)(struct smu_context *smu, uint32_t speed);
int (*set_fan_speed_rpm)(struct smu_context *smu, uint32_t speed);
int (*set_xgmi_pstate)(struct smu_context *smu, uint32_t pstate);
int (*gfx_off_control)(struct smu_context *smu, bool enable);
uint32_t (*get_gfx_off_status)(struct smu_context *smu);
u32 (*get_gfx_off_entrycount)(struct smu_context *smu, uint64_t
*entrycount);
u32 (*set_gfx_off_residency)(struct smu_context *smu, bool start);
u32 (*get_gfx_off_residency)(struct smu_context *smu, uint32_t
*residency);
int (*register_irq_handler)(struct smu_context *smu);
int (*get_max_sustainable_clocks_by_dc)(struct smu_context *smu,
struct pp_smu_nv_clock_table *max_clocks);
int (*get_bamaco_support)(struct smu_context *smu);
int (*baco_enter)(struct smu_context *smu);
int (*baco_exit)(struct smu_context *smu);
bool (*mode1_reset_is_support)(struct smu_context *smu);
int (*mode1_reset)(struct smu_context *smu);
int (*mode2_reset)(struct smu_context *smu);
int (*enable_gfx_features)(struct smu_context *smu);
int (*link_reset)(struct smu_context *smu);
int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum
smu_clk_type clk_type, uint32_t *min, uint32_t *max);
int (*set_soft_freq_limited_range)(struct smu_context *smu, enum
smu_clk_type clk_type, uint32_t min, uint32_t max, bool automatic);
int (*set_power_source)(struct smu_context *smu, enum
smu_power_src_type power_src);
void (*log_thermal_throttling_event)(struct smu_context *smu);
size_t (*get_pp_feature_mask)(struct smu_context *smu, char *buf);
int (*set_pp_feature_mask)(struct smu_context *smu, uint64_t
new_mask);
ssize_t (*get_gpu_metrics)(struct smu_context *smu, void **table);
ssize_t (*get_pm_metrics)(struct smu_context *smu, void *pm_metrics,
size_t size);
int (*enable_mgpu_fan_boost)(struct smu_context *smu);
int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
int (*get_fan_parameters)(struct smu_context *smu);
int (*post_init)(struct smu_context *smu);
void (*interrupt_work)(struct smu_context *smu);
int (*gpo_control)(struct smu_context *smu, bool enablement);
int (*gfx_state_change_set)(struct smu_context *smu, uint32_t
state);
int (*set_fine_grain_gfx_freq_parameters)(struct smu_context *smu);
int (*smu_handle_passthrough_sbr)(struct smu_context *smu, bool
enable);
int (*wait_for_event)(struct smu_context *smu, enum smu_event_type
event, uint64_t event_arg);
int (*send_hbm_bad_pages_num)(struct smu_context *smu, uint32_t
size);
int (*send_rma_reason)(struct smu_context *smu);
int (*reset_sdma)(struct smu_context *smu, uint32_t inst_mask);
int (*dpm_reset_vcn)(struct smu_context *smu, uint32_t inst_mask);
ssize_t (*get_ecc_info)(struct smu_context *smu, void *table);
int (*stb_collect_info)(struct smu_context *smu, void *buf, uint32_t
size);
int (*get_default_config_table_settings)(struct smu_context *smu,
struct config_table_setting *table);
int (*set_config_table)(struct smu_context *smu, struct
config_table_setting *table);
int (*send_hbm_bad_channel_flag)(struct smu_context *smu, uint32_t
size);
int (*init_pptable_microcode)(struct smu_context *smu);
int (*dpm_set_vpe_enable)(struct smu_context *smu, bool enable);
int (*dpm_set_isp_enable)(struct smu_context *smu, bool enable);
int (*dpm_set_umsch_mm_enable)(struct smu_context *smu, bool
enable);
int (*set_mall_enable)(struct smu_context *smu);
int (*notify_rlc_state)(struct smu_context *smu, bool en);
bool (*is_asic_wbrf_supported)(struct smu_context *smu);
int (*enable_uclk_shadow)(struct smu_context *smu, bool enable);
int (*set_wbrf_exclusion_ranges)(struct smu_context *smu, struct
freq_band_range *exclusion_ranges);
ssize_t (*get_xcp_metrics)(struct smu_context *smu, int xcp_id, void
*table);
int (*ras_send_msg)(struct smu_context *smu, enum smu_message_type
msg, uint32_t param, uint32_t *read_arg);
int (*set_power_dep)(struct smu_context *smu, bool enable);
};
π«Ά Members
run_btcβ calibrates the voltage/frequency curve so it fits the system's power delivery and voltage margins. it is required for adaptive voltage frequency scaling (AVFS). slay, voltage accuracy πinit_allowed_featuresβ initializes the allowed features bitmap. it directly sets allowed features usingsmu_featurewrapper functions.get_current_power_stateβ gets the current power state.Return:current power state on success, negativeerrnoon failure. bestie, if it fails it's giving negativeerrnoenergy πset_default_dpm_tableβ retrieves the default overdrive settings from the SMU. iconic defaults behavior πpopulate_umd_state_clkβ populates the UMD power state table with defaults. yes, defaults, we love a clean starting point β¨emit_clk_levelsβ prints DPM clock levels for a clock domain to buffer usingsysfs_emit_at. it stars the current level β
used for sysfs interfaces. buf is the sysfs buffer. offset is the offset within the buffer to start printing, which is updated by the function.
Return: 0 on Success or Negative to indicate an error occurred. periodt.
force_clk_levelsβ Set a range of allowed DPM levels for a clock domain.clk_type: the clock domain.mask: range of allowed DPM levels. lowkey the vibe controller for your clocks πod_edit_dpm_tableβ Edit the custom overdrive DPM table.type: type of edit.input: edit parameters.size: size of input. custom tuning era β¨restore_user_od_settingsβ Restore the user customized OD settings on S3/S4/Runpm resume. your tweaks come back from their nap π΄get_clock_by_type_with_latencyβ Get the speed and latency of a clock domain. speed + latency, together, iconic π«Άget_power_profile_modeβ Print all power profile modes to buffer. Star current mode. the little star is doing main character energy βset_power_profile_modeβ Set a power profile mode. Also used to create/set custom power profile modes.input: power profile mode parameters.workload_mask: mask of workloads to enable.custom_params: custom profile parameters.custom_params_max_idx: max valid idx intocustom_params. custom mode girlies rise πdpm_set_vcn_enableβ Enable/disable VCN engine dynamic power management. VCN? managed. πdpm_set_jpeg_enableβ Enable/disable JPEG engine dynamic power management. JPEG? also managed. πset_gfx_power_up_by_imuβ Enable GFX engine with IMU. GFX waking up via IMU, periodt π₯read_sensorβ Read data from a sensor.sensor: sensor to read data from.data: sensor reading.size: size of data. sensor gossip, but make it data πΈget_apu_thermal_limitβ Get APU core limit from SMU.limit: current limit temperature in millidegrees Celsius. thermal tea βset_apu_thermal_limitβ Update all controllers with new limit.limit: limit temperature to be setted, in millidegrees Celsius. yes, βsettedβ β source said it, bestie πpre_display_config_changedβ Prepare GPU for a display configuration change. Disable display tracking and pin memory clock speed to maximum. Used in display component synchronization. pre-change prep era β¨display_config_changedβ Notify the SMU of the current display configuration. Allows SMU to properly track blanking periods for memory clock adjustment. Used in display component synchronization. blanking periods getting tracked fr fr π¦notify_smc_display_configβ Applies display requirements to the current power state. Optimize deep sleep DCEFclk and mclk for the current display configuration. Used in display component synchronization. deep sleep + display config, slay πis_dpm_runningβ Check if DPM is running. Return: True if DPM is running, false otherwise. vibe check: is it running? πget_fan_speed_pwmβ Get the current fan speed in PWM. fan speed, PWM edition π¨get_fan_speed_rpmβ Get the current fan speed in rpm. fan speed, rpm edition π¨set_watermarks_tableβ Configure and upload the watermarks tables to the SMU. watermarks table said βupload meβ π€get_thermal_temperature_rangeβ Get safe thermal limits in Celcius. safe thermal limits, spelled exactly like that in the source π₯΅get_uclk_dpm_statesβ Get memory clock DPM levels in kHz.clocks_in_khz: array of DPM levels.num_states: elements inclocks_in_khz. kHz girlies know πset_default_od_settingsβ Set the overdrive tables to defaults. reset to default, no cap πset_performance_levelβ Set a performance level. performance level: selected βdisplay_disable_memory_clock_switchβ Enable/disable dynamic memory clock switching. Disabling this feature forces memory clock speed to maximum. Enabling sets the minimum memory clock capable of driving the current display configuration. heads up: disabling pins memory clock to max, so read the vibe before flipping it πget_ppt_limitβ Get the effective runtime PPT0 or PPT1 limit. PPT0/PPT1 runtime limit tea βset_df_cstateβ Set data fabric cstate. data fabric cstate, handled β¨update_pcie_parametersβ Update and upload the system's PCIe capabilites to the SMU.pcie_gen_cap: maximum allowed PCIe generation.pcie_width_cap: maximum allowed PCIe width. PCIe caps, uploaded with love π«Άi2c_initβ Initialize i2c. The i2c bus is used internally by the SMU voltage regulators and other devices. The i2c's EEPROM also stores bad page tables on boards with ECC. i2c has lore, bestie π§i2c_finiβ Tear down i2c. i2c said bye πget_unique_idβ Get the GPU's unique id. Used for asset tracking. unique id = GPUβs government name πget_dpm_clock_tableβ Get a copy of the DPM clock table. Used by display component in bandwidth and watermark calculations. DPM clock table copy, for the display math girlies πΈinit_microcodeβ Request the SMU's firmware from the kernel. firmware request: sent π¨load_microcodeβ Load firmware onto the SMU. firmware load: slay π«fini_microcodeβ Release the SMU's firmware. firmware release: bye bestie πinit_smc_tablesβ Initialize the SMU tables. SMU tables: initialized β¨fini_smc_tablesβ Release the SMU tables. SMU tables: released πinit_powerβ Initialize the power gate table context. power gate table context: ready π₯fini_powerβ Release the power gate table context. power gate table context: done π¦check_fw_statusβ Check the SMU's firmware status. Return: Zero if check passes, negative errno on failure. fw status check: pass or errno πset_mp1_stateβ Put SMU into a correct state for comming resume from runpm or gpu reset. yes, βcommingβ β source spelling, periodt πsetup_pptableβ Initialize the power play table and populate it with default values. pptable setup + defaults = iconic combo πget_vbios_bootup_valuesβ Get default boot values from the VBIOS. VBIOS boot values, received π«Άcheck_fw_versionβ Print driver and SMU interface versions to the system log. Interface mismatch is not a critical failure. version check: log it, but mismatch isnβt critical, bestie β¨powergate_sdmaβ Power up/down system direct memory access. SDMA power up/down, handled πset_gfx_cgpgβ Enable/disable graphics engine course grain power gating. yes, βcourse grainβ β source said it, not me πwrite_pptableβ Write the power play table to the SMU. pptable: written πset_driver_table_locationβ Send the location of the driver table to the SMU. driver table location: sent πset_tool_table_locationβ Send the location of the tool table to the SMU. tool table location: sent πnotify_memory_pool_locationβ Send the location of the memory pool to the SMU. memory pool location: sent πsystem_features_controlβ Enable/disable all SMU features. all the SMU features, on or off, no cap π₯init_display_countβ Notify the SMU of the number of display components in current display configuration. display count: SMU knows πset_allowed_maskβ Notify the SMU of the features currently allowed by the driver. allowed mask: told the SMU β¨get_enabled_maskβ Get a mask of features that are currently enabled on the SMU.feature_mask: enabled feature mask. enabled mask: received π«Άfeature_is_enabledβ Test if a feature is enabled. Return: One if enabled, zero if disabled. feature check: 1 or 0, bestie πdisable_all_features_with_exceptionβ Disable all features with exception to those in mask. everything off except the mask β dramatic but clear πnotify_display_changeβ General interface call to let SMU know about DC change. DC change: SMU notified π¦set_ppt_limitβ Set the PPT0 or PPT1 limit in watts. PPT0/PPT1 limit: watts era π₯init_max_sustainable_clocksβ Populate max sustainable clock speed table with values from the SMU. max sustainable clocks: populated from SMU πenable_thermal_alertβ Enable thermal alert interrupts. thermal alerts: on π¨disable_thermal_alertβ Disable thermal alert interrupts. thermal alerts: off π΄set_min_dcef_deep_sleepβ Set a minimum display fabric deep sleep clock speed in MHz. minimum DCEF deep sleep clock: MHz, set πdisplay_clock_voltage_requestβ Set a hard minimum frequency for a clock domain. hard minimum frequency: requested πget_fan_control_modeβ Get the current fan control mode. fan control mode: fetched π¨set_fan_control_modeβ Set the fan control mode. fan control mode: set π¨set_fan_speed_pwmβ Set a static fan speed in PWM. static fan speed, PWM: set π¨set_fan_speed_rpmβ Set a static fan speed in rpm. static fan speed, rpm: set π¨set_xgmi_pstateβ Set inter-chip global memory interconnect pstate.pstate: pstate to set. D0 if Nonzero, D3 otherwise. XGMI pstate: D0 if nonzero, D3 otherwise π§gfx_off_controlβ Enable/disable graphics engine poweroff. GFX poweroff: controlled π΄get_gfx_off_statusβ Get graphics engine poweroff status. Return: 0 - GFXOFF(default). 1 - Transition out of GFX State. 2 - Not in GFXOFF. 3 - Transition into GFXOFF. GFXOFF status lore: 0, 1, 2, 3 πset_gfx_off_residencyβ set 1 to start logging, 0 to stop logging. 1 = start logging, 0 = stop logging πget_gfx_off_residencyβ Live GFXOFF residency percentage. live GFXOFF residency percentage: iconic stats moment πregister_irq_handlerβ Register interupt request handlers. yes, βinteruptβ β source spelling, iykyk πget_max_sustainable_clocks_by_dcβ Get a copy of the max sustainable clock speeds table. Provides a way for the display component (DC) to get the max sustainable clocks from the SMU. DC gets max sustainable clocks from SMU π«Άget_bamaco_supportβ Check if GPU supports BACO/MACO. BACO: Bus Active, Chip Off. MACO: Memory Active, Chip Off. BACO/MACO support check: acronym slay π₯baco_enterβ Enter BACO. BACO: entered πͺbaco_exitβ Exit Baco. Baco: exited πmode1_reset_is_supportβ Check if GPU supports mode1 reset. mode1 reset support: checking πmode1_resetβ Perform mode1 reset. Complete GPU reset. mode1 reset = full GPU reset, periodt π₯mode2_resetβ Perform mode2 reset. Mode2 reset generally does not reset as many IPs as mode1 reset. The IPs reset varies by asic. mode2 reset: fewer IPs than mode1, and which ones varies by asic πlink_resetβ Perform link reset. The gfx device driver reset. link reset: gfx device driver reset π¦get_dpm_ultimate_freqβ Get the hard frequency range of a clock domain in MHz. hard frequency range: MHz, fetched πset_soft_freq_limited_rangeβ Set the soft frequency range of a clock domain in MHz. soft frequency range: MHz, set πset_power_sourceβ Notify the SMU of the current power source. power source: SMU notified πlog_thermal_throttling_eventβ Print a thermal throttling warning to the system's log. thermal throttling warning: logged π¨get_pp_feature_maskβ Print a human readable table of enabled features to buffer. human readable feature table: printed to buffer πset_pp_feature_maskβ Request the SMU enable/disable features to match those enabled innew_mask. SMU feature mask update: matchnew_maskβ¨get_gpu_metricsβ Get a copy of the GPU metrics table from the SMU. Return: Size of table. GPU metrics table copy: size returned πget_pm_metricsβ Get one snapshot of power management metrics from PMFW. Return: Size of the metrics sample. one PMFW metrics snapshot: size returned πΈenable_mgpu_fan_boostβ Enable multi-GPU fan boost. multi-GPU fan boost: enabled π¨gfx_ulv_controlβ Enable/disable ultra low voltage. ultra low voltage: controlled β‘deep_sleep_controlβ Enable/disable deep sleep. deep sleep: controlled π΄get_fan_parametersβ Get fan parameters. Get maximum fan speed from the power play table. fan parameters + max fan speed from pptable π¨post_initβ Helper function for asic specific workarounds. asic-specific workaround helper: post_init π οΈinterrupt_workβ Work task scheduled from SMU interrupt handler. SMU interrupt work task: scheduled βοΈgpo_controlβ Enable/disable graphics power optimization if supported. graphics power optimization: controlled if supported πgfx_state_change_setβ Send the current graphics state to the SMU. current graphics state: sent to SMU π¦set_fine_grain_gfx_freq_parametersβ Set fine grain graphics clock parameters to defaults. fine grain GFX clock params: defaults, slay πsmu_handle_passthrough_sbrβ Send message to SMU about special handling for SBR. SBR special handling message: sent π¨wait_for_eventβ Wait for events from SMU. waiting for SMU eventsβ¦ β³send_rma_reasonβ message rma reason event to SMU. rma reason event: messaged to SMU πreset_sdmaβ message SMU to soft reset sdma instance. soft reset sdma instance: SMU messaged πstb_collect_infoβ Collects Smart Trace Buffers data. Smart Trace Buffers data: collected π§get_default_config_table_settingsβ Get the ASIC default DriverSmuConfig table settings. ASIC default DriverSmuConfig table settings: fetched πset_config_tableβ Apply the input DriverSmuConfig table settings. input DriverSmuConfig table settings: applied β¨init_pptable_microcodeβ Prepare the pptable microcode to upload via PSP. pptable microcode prepped for PSP upload π«Άdpm_set_vpe_enableβ turns the VPE engine's dynamic power management on or off β¨ like a little light switch for power, bestie.dpm_set_isp_enableβ same vibe, different engine: enable/disable ISP engine dynamic power management πdpm_set_umsch_mm_enableβ and the UMSCH engine gets the same treatment: enable/disable its dynamic power management πset_mall_enableβ sets up the MALL power gating control, i.e. the init moment for MALL gating πnotify_rlc_stateβ tells the SMU what the RLC power state is, so everybody's on the same page fr fr π«Άis_asic_wbrf_supportedβ literally just checks whether the PMFW supports the wbrf feature. A yes/no vibe check πenable_uclk_shadowβ enables the uclk shadow feature, and only on wbrf-supported setups π«set_wbrf_exclusion_rangesβ notifies the SMU which wifi bands are occupied, so it knows what to avoid πΆget_xcp_metricsβ grabs a copy of the partition metrics table from the SMU. Returns: size of the table π iconic little data handoff.ras_send_msgβ sends a message with a parameter, from the Ras message. The args, spelled out: msg is the type of message, param is the message parameter, and read_arg is the SMU response β which is optional, no pressure πset_power_depβ creates or destroys a power dependency link from an integrated xHCI controller to the GPU, so that the GPU gets resumed before the USB controller during PM resume. Passenableas true to create the link, false to tear it all the way down ππ₯
π SEE ALSO β¨
Kernel file ./drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h, plus these absolute besties:
struct smu_msg_config(9)struct smu_msg_args(9)struct smu_msg_ops(9)struct smu_msg_ctl(9)struct smu_temp_funcs(9)smu_memcpy_trailing(9)
Okay that's the whole page bestie, we ate and left no crumbs π§π Shoutout to the source living at ./drivers/gpu/drm/amd/pm/swsmu..., dated October 2026, all about struct pptable_funcs(9) β go forth and power-manage responsibly, ily ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms