STRUCT PPC440SPE_ADMA_CHAN(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… NAME πŸ’…

struct ppc440spe_adma_chan β€” the internal representation of an ADMA channel, bestie. It's from the Kernel API Manual, and it's giving "backstage pass to the whole channel" energy ✨


πŸŽ€ SYNOPSIS πŸŽ€

struct ppc440spe_adma_chan {
    spinlock_t lock;
    struct ppc440spe_adma_device *device;
    struct list_head chain;
    struct dma_chan common;
    struct list_head all_slots;
    struct ppc440spe_adma_desc_slot *last_used;
    int pending;
    int slots_allocated;
    int hw_chain_inited;
    struct tasklet_struct irq_tasklet;
    u8 needs_unmap;
    struct page *pdest_page;
    struct page *qdest_page;
    dma_addr_t pdest;
    dma_addr_t qdest;
 };

Copy that exactly, ok? Every field, every semicolon, no cap 🫢


πŸ¦‹ Members πŸ¦‹

  • lock β€” this one serializes enqueue/dequeue operations to the slot pool. Basically the bouncer at the door keeping the queue from turning into chaos πŸ”₯
  • device β€” the parent device. Its ride-or-die origin story πŸ’–
  • chain β€” the device chain view of the descriptors. Like the group chat view of who's in the chat πŸ‘€
  • common β€” the common dmaengine channel object members. Shared queen behavior, iconic 🌈
  • all_slots β€” the complete domain of slots usable by the channel. Every slot it's allowed to touch, periodt ✨
  • pending β€” allows batching of hardware operations. Lowkey the "wait, stack a few more in before we go" field πŸŽ€
  • slots_allocated β€” records the actual size of the descriptor slot pool. Receipts, literally 🧾
  • hw_chain_inited β€” the h/w descriptor chain initialization flag. Is the chain set up or not? This knows πŸ’…
  • irq_tasklet β€” bottom half where ppc440spe_adma_slot_cleanup runs. The cleanup crew, working quietly in the background 🧚
  • needs_unmap β€” if buffers should not be unmapped upon final processing. Yeah β€” read that again πŸ™ˆ
  • pdest_page β€” P destination page for async validate operation πŸ“
  • qdest_page β€” Q destination page for async validate operation πŸ“
  • pdest β€” P dma addr for async validate operation ⭐
  • qdest β€” Q dma addr for async validate operation ⭐
Not me pointing out that last_used is chillin' in the struct but has no little blurb in the Members list β€” that's just how it is in the original, so we're not gonna invent one πŸ’€

πŸ‘‘ SEE ALSO πŸ‘‘

  • Kernel file ./drivers/dma/ppc4xx/adma.h
  • struct ppc440spe_adma_device(9)
  • struct ppc440spe_adma_desc_slot(9)

Go read them, iykyk πŸ“š


That's the whole page, bestie β€” slayed, no facts lost 🌸 This cutie came from the Kernel API Manual, source/version ./drivers/dma/ppc4xx, dated October 2026, and the page itself is struct ppc440spe_adma_chan(9). Byeee πŸ«ΆπŸ’œ

πŸ“¦ where this page comes from