STRUCT PMC_DEV(9)
π NAME π
okay so bestie, welcome to struct pmc_dev β the pmc device structure, in the Kernel API Manual (that's section 9, the kernely one, iykyk). It's literally the vibe check for a power management controller device, and we're gonna go through it field by field, no cap. π¦
β¨ SYNOPSIS β¨
here's the whole struct, character for character, do not touch, she's perfect:
struct pmc_dev {
struct pmc *pmcs[MAX_NUM_PMC];
struct dentry *dbgfs_dir;
struct platform_device *pdev;
unsigned int crystal_freq;
int pmc_xram_read_bit;
struct mutex lock;
u64 s0ix_counter;
void (*suspend)(struct pmc_dev *pmcdev);
int (*resume)(struct pmc_dev *pmcdev);
u64 *pkgc_res_cnt;
u8 num_of_pkgc;
u32 die_c6_offset;
struct telem_endpoint *pc_ep;
struct telem_endpoint *punit_ep;
struct pmc_info *regmap_list;
const char **pkgc_ltr_blocker_counters;
u32 pkgc_ltr_blocker_offset;
const char **pkgc_blocker_counters;
u32 pkgc_blocker_offset;
};
π Members π
okay so here's the member-by-member tour. the ones below are the ones this page actually spells out for you β a few of the fields up there (pmcs, lock, die_c6_offset, pc_ep, punit_ep, regmap_list) are just vibing in the struct without a lil description on this page, and that's just how it is. π
dbgfs_dirβ path to debugfs interface. that's the door to the debug filesystem, bestie. πpdevβ pointer toplatform_devicestruct. slay, a pointer to the platform device.crystal_freqβ crystal frequency from cpuid. yes, fromcpuid, she asked the CPU directly. βpmc_xram_read_bitβ flag to indicate whether PMC XRAM shadow registers used to read MPHY PG and PLL status are available. so: is the XRAM shadow-register route for reading MPHY PG and PLL status a thing or not. binary queen. πs0ix_counterβ S0ix residency (step adjusted). the residency number, already step-adjusted for you. πsuspendβ Function to perform platform specific suspend. platform does its own suspend thing. πresumeβ Function to perform platform specific resume. and the matching resume. πΈpkgc_res_cntβ Array of PKGC residency counters. π₯num_of_pkgcβ Number of PKGC. that's how many PKGCs we're dealing with. fr fr. πpkgc_ltr_blocker_countersβ Array of PKGC LTR blocker counters. π«Άpkgc_ltr_blocker_offsetβ Offset to PKGC LTR blockers in telemetry region. πpkgc_blocker_countersβ Array of PKGC blocker counters. β¨pkgc_blocker_offsetβ Offset to PKGC blocker in telemetry region. π¦
π§ Description π§
like, the whole entire point: pmc_dev contains info about power management controller device. that's it, that's the tea. one struct, all the PMC device info, main character energy. π
β SEE ALSO β
the crossover episode, bestie:
- Kernel file
./drivers/platform/x86/intel/pmc/core.hstruct pmc_reg_map(9)struct pmc_info(9)struct pmc(9)struct pmc_dev_info(9)
ngl, go read those too, they're all part of the same friend group π«Ά
okay bye bestie, mwah π β this page lives at ./drivers/platform/x86/intel/pmc, dated October 2026, and it's struct pmc_dev(9) all the way down. π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms