STRUCT PHY_CONFIGURE_OPTS_MIPI_DPHY(9)

🌸 NAME 🌸

okay so bestie, welcome to the struct phy_configure_opts_mipi_dphy(9) page 💖 — this one lives in the Kernel API Manual and it's literally the MIPI D-PHY configuration set. that's it, that's the vibe ✨

🎀 SYNOPSIS 🎀

struct phy_configure_opts_mipi_dphy {
    unsigned int            clk_miss;
    unsigned int            clk_post;
    unsigned int            clk_pre;
    unsigned int            clk_prepare;
    unsigned int            clk_settle;
    unsigned int            clk_term_en;
    unsigned int            clk_trail;
    unsigned int            clk_zero;
    unsigned int            d_term_en;
    unsigned int            eot;
    unsigned int            hs_exit;
    unsigned int            hs_prepare;
    unsigned int            hs_settle;
    unsigned int            hs_skip;
    unsigned int            hs_trail;
    unsigned int            hs_zero;
    unsigned int            init;
    unsigned int            lpx;
    unsigned int            ta_get;
    unsigned int            ta_go;
    unsigned int            ta_sure;
    unsigned int            wakeup;
    unsigned long           hs_clk_rate;
    unsigned long           lp_clk_rate;
    unsigned char           lanes;
};

💅 MEMBERS 💅

okay so here's the full roster, no members left behind, every single one is getting her moment 👑

• clk_miss — Timeout, in picoseconds, for the receiver to detect the absence of Clock transitions and then disable the Clock Lane HS-RX.
  • Maximum value: 60000 ps
• clk_post — Time, in picoseconds, that the transmitter keeps sending the HS clock after the last associated Data Lane has transitioned over to LP Mode. the interval is defined as the period from the end of hs_trail to the beginning of clk_trail.
  • Minimum value: 60000 ps + 52 * hs_clk_rate period in ps
• clk_pre — Time, in UI, that the HS clock shall be driven by the transmitter before any associated Data Lane starts the whole LP → HS mode transition.
  • Minimum value: 8 UI
• clk_prepare — Time, in picoseconds, that the transmitter drives the Clock Lane LP-00 Line state right before the HS-0 Line state that kicks off the HS transmission.
  • Minimum value: 38000 ps
  • Maximum value: 95000 ps
• clk_settle — Time interval, in picoseconds, during which the HS receiver should ignore any Clock Lane HS transitions, starting from the beginning of clk_prepare.
  • Minimum value: 95000 ps
  • Maximum value: 300000 ps
• clk_term_en — Time, in picoseconds, for the Clock Lane receiver to enable the HS line termination.
  • Maximum value: 38000 ps
• clk_trail — Time, in picoseconds, that the transmitter drives the HS-0 state after the last payload clock bit of a HS transmission burst.
  • Minimum value: 60000 ps
• clk_zero — Time, in picoseconds, that the transmitter drives the HS-0 state prior to starting the Clock. (no min, no max, she's free 🦋)
• d_term_en — Time, in picoseconds, for the Data Lane receiver to enable the HS line termination.
  • Maximum value: 35000 ps + 4 * hs_clk_rate period in ps
• eot — Transmitted time interval, in picoseconds, from the start of hs_trail or clk_trail all the way to the start of the LP-11 state following a HS burst.
  • Maximum value: 105000 ps + 12 * hs_clk_rate period in ps
• hs_exit — Time, in picoseconds, that the transmitter drives LP-11 following a HS burst.
  • Minimum value: 100000 ps
• hs_prepare — Time, in picoseconds, that the transmitter drives the Data Lane LP-00 Line state right before the HS-0 Line state that starts the HS transmission.
  • Minimum value: 40000 ps + 4 * hs_clk_rate period in ps
  • Maximum value: 85000 ps + 6 * hs_clk_rate period in ps
• hs_settle — Time interval, in picoseconds, during which the HS receiver shall ignore any Data Lane HS transitions, starting from the beginning of hs_prepare.
  • Minimum value: 85000 ps + 6 * hs_clk_rate period in ps
  • Maximum value: 145000 ps + 10 * hs_clk_rate period in ps
• hs_skip — Time interval, in picoseconds, during which the HS-RX should ignore any transitions on the Data Lane, following a HS burst. the end point of the interval is defined as the beginning of the LP-11 state following the HS burst.
  • Minimum value: 40000 ps
  • Maximum value: 55000 ps + 4 * hs_clk_rate period in ps
• hs_trail — Time, in picoseconds, that the transmitter drives the flipped differential state after the last payload data bit of a HS transmission burst.
  • Minimum value: max(8 * hs_clk_rate period in ps, 60000 ps + 4 * hs_clk_rate period in ps)
• hs_zero — Time, in picoseconds, that the transmitter drives the HS-0 state before transmitting the Sync sequence.
• init — Time, in microseconds, for the initialization period to complete 👀 note the unit switch bestie, this one's us not ps.
  • Minimum value: 100 us
• lpx — Transmitted length, in picoseconds, of any Low-Power state period.
  • Minimum value: 50000 ps
• ta_get — Time, in picoseconds, that the new transmitter drives the Bridge state (LP-00) after accepting control during a Link Turnaround.
  • Value: 5 * lpx
• ta_go — Time, in picoseconds, that the transmitter drives the Bridge state (LP-00) before releasing control during a Link Turnaround.
  • Value: 4 * lpx
• ta_sure — Time, in picoseconds, that the new transmitter waits after the LP-10 state before transmitting the Bridge state (LP-00) during a Link Turnaround.
  • Minimum value: lpx
  • Maximum value: 2 * lpx
• wakeup — Time, in microseconds, that a transmitter drives a Mark-1 state prior to a Stop state, in order to initiate an exit from ULPS.
  • Minimum value: 1000 us
• hs_clk_rate — Clock rate, in Hertz, of the high-speed clock. 🕰️
• lp_clk_rate — Clock rate, in Hertz, of the low-power clock. 🕰️
• lanes — Number of active, consecutive, data lanes, starting from lane 0, used for the transmissions.

✨ DESCRIPTION ✨

so basically this structure is used to represent the configuration state of a MIPI D-PHY phy. that's the whole assignment, she's a config holder and she's serving 💅

🫶 SEE ALSO 🫶

• Kernel file ./include/linux/phy/phy-mipi-dphy.h

and that's the page bestie, go configure some phys 🌈💖

sign-off cuteness: this one came from ./include/linux/phy and she's dated October 2026 — page struct phy_configure_opts_mipi_dphy(9), periodt 🎀✨