STRUCT PDIV_MAP(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct pdiv_map(9) β€” the kernel API manual, but make it make sense

okay so bestie, welcome to struct pdiv_map(9) 🌸 this is a lil page from the Kernel API Manual and it's literally the whole personality of a post-divider-to-hardware-value mapping. yes it's small. yes it's iconic. let's get into it πŸŽ€


✨ NAME ✨

struct pdiv_map β€” maps a post divider over to its hw value. that's the whole gig, no cap 🫢


✨ SYNOPSIS ✨

struct pdiv_map {
    u8 pdiv;
    u8 hw_val;
 };

look at her. two whole u8 fields. absolute main character energy πŸ’…


✨ Members ✨

  • pdiv β€” the post divider itself, bestie. that's the value. the divider. the post one πŸ¦‹
  • hw_val β€” the value that's gonna be written to the PLL hw πŸ”₯ that's it, that's the field.

✨ SEE ALSO ✨

ngl this is the friend group and you should absolutely go meet all of them πŸ’– they all live in the kernel file ./drivers/clk/tegra/clk.h:

  • struct tegra_clk_sync_source(9)
  • struct tegra_clk_frac_div(9)
  • struct tegra_clk_pll_freq_table(9)
  • struct div_nmp(9)
  • struct tegra_clk_pll_params(9)
  • struct tegra_clk_pll(9)
  • struct tegra_audio_clk_info(9)
  • struct tegra_clk_pll_out(9)
  • struct tegra_clk_periph_regs(9)
  • struct tegra_clk_periph_gate(9)
  • struct tegra_sdmmc_mux(9)

lowkey the tiniest struct in the whole clock tree and she still ate πŸ“

okay that's the page!! this one came out of ./drivers/clk/tegra and it's dated October 2026 ⭐ catch you in the next manpage, mwah πŸ’œπŸ§š

πŸ“¦ where this page comes from