STRUCT PDC_IRQ_CFG(9)

✨ struct pdc_irq_cfg ✨

okay so bestie, welcome to the Kernel API Manual 🫶 this one's a lil struct page — struct pdc_irq_cfg, and it's literally just the bit fields for the PDC IRQ_CFG register. no cap, that's the whole NAME energy. let's get into it 💅

---

🌸 SYNOPSIS 🌸

here's the whole vibe, copied exactly so you can trust me:

struct pdc_irq_cfg {
    u32 gpio_irq_sts;
    u32 gpio_irq_mask;
    u32 irq_enable;
    u32 irq_type;
 };

four u32 members, she's compact, she's tidy, she's giving "small struct, big job" energy 💖

---

🎀 Members 🎀

• gpio_irq_sts — this one is the bit number for the GPIO_STATUS field. that's it, that's her whole personality ✨
• gpio_irq_mask — the bit number for the GPIO_MASK field. mask on, bestie 🎭
• irq_enable — the bit number for the IRQ_ENABLE field. iconic little enable bit, we love to see it 👑
• irq_type — and this one is a GENMASK for the IRQ_TYPE field, so she's not a single bit, she's a whole masked range, main character energy fr fr 🔥

ngl the pattern here is: three of these are bit numbers, and one of them is a GENMASK. don't mix that up or the vibe check will fail 😭

---

🦋 SEE ALSO 🦋

go read these next, they're all in the Kernel file ./drivers/irqchip/qcom-pdc.c — like, all of them, same file, cute right? 💜

• struct pdc_regs(9)
• struct pdc_desc(9)
• qcom_pdc_gic_set_type(9)
• qcom_pdc_gic_secondary_set_type(9)

---

⭐ friendly reminder from the page itself: everything above lives in ./drivers/irqchip. that's a real path, don't @ me 🙈

---

and that's the page!! 🌈 mwah, you slayed. this was from the Kernel API Manual, filed under ./drivers/irqchip, dated October 2026 — take care of her, she's small but she's doing her best 🍓🧚💖