STRUCT PDC_DESC(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct pdc_desc(9) πŸ’…

okay so this is from the Kernel API Manual bestie, and it's literally the manual page for struct pdc_desc β€” the PDC driver state. yes we're doing kernel structs today, put your hair up, we're slaying ✨


🌸 NAME 🌸

struct pdc_desc β€” the PDC driver state, fr fr. it's giving "everything the driver needs to know about itself" energy 🫢


πŸ¦‹ SYNOPSIS πŸ¦‹

struct pdc_desc {
    void __iomem                    *base;
    void __iomem                    *prev_base;
    u32 version;
    u32 num_spis;
    struct pdc_pin_region           *region;
    int region_cnt;
    bool x1e_quirk;
    u8 mode;
    raw_spinlock_t lock;
    const struct pdc_regs           *regs;
    const struct pdc_irq_cfg        *cfg_fields;
    void (*enable_intr)(int pin_out, bool on);
    void (*unmask_gpio)(int pin_out, bool on);
    void (*clear_gpio)(int pin_out);
};

like look at her. thirteen fields. main character struct energy πŸ‘‘


πŸŽ€ Members πŸŽ€

  • base β€” the PDC base register for DRV2 / HLOS. this is the home base, the headquarters, the where it all happens πŸ’–
  • prev_base β€” the PDC DRV1 base, and heads up: it's applicable only for the x1e RTL bug πŸ™ˆ like it's a special-case field, not a general-purpose one, ok?
  • version β€” the PDC version. which era of PDC are we in, iykyk
  • num_spis β€” total number of direct SPI interrupts 🎯
  • region β€” the PDC interrupt continuous range
  • region_cnt β€” total PDC ranges, yes total, don't @ me
  • x1e_quirk β€” x1e H/W Bug handling. it's literally a bool for "we have to deal with the hardware bug" πŸ’€
  • mode β€” PDC_PASS_THROUGH_MODE or PDC_SECONDARY_MODE. pick one bestie, it's a whole vibe check 🌈
  • lock β€” the lock for IRQ_ENABLE_BANK protection πŸ”’ protect her at all costs
  • regs β€” PDC regs (IRQ_ENABLE_BANK and IRQ_CFG)
  • cfg_fields β€” the fields of the IRQ_CFG reg
  • enable_intr β€” pointer to the enable function, and it's chosen based on PDC version. version-dependent function pointer, so fetch πŸ’…
  • unmask_gpio β€” pointer to the GPIO irq unmask function
  • clear_gpio β€” pointer to the GPIO irq clear function

⭐ SEE ALSO ⭐

go read these next, bestie, they're the whole friend group 🫢


ngl this struct is basically a little dashboard for the PDC driver: where the registers live, which version we're on, how many SPIs and regions there are, whether the x1e hardware bug needs handling, which mode we're in, a lock guarding IRQ_ENABLE_BANK, the register and config-field descriptors, plus three function pointers that get swapped around depending on version and purpose. iconic behavior honestly 🌟

and that's the page!! brought to you straight out of ./drivers/irqchip, dated October 2026 β€” see you in the future bestie, mwah πŸ’œπŸŽ€βœ¨

πŸ“¦ where this page comes from