STRUCT PDC_DESC(9)
π struct pdc_desc(9) π
okay so this is from the Kernel API Manual bestie, and it's literally the manual page for struct pdc_desc β the PDC driver state. yes we're doing kernel structs today, put your hair up, we're slaying β¨
πΈ NAME πΈ
struct pdc_desc β the PDC driver state, fr fr. it's giving "everything the driver needs to know about itself" energy π«Ά
π¦ SYNOPSIS π¦
struct pdc_desc {
void __iomem *base;
void __iomem *prev_base;
u32 version;
u32 num_spis;
struct pdc_pin_region *region;
int region_cnt;
bool x1e_quirk;
u8 mode;
raw_spinlock_t lock;
const struct pdc_regs *regs;
const struct pdc_irq_cfg *cfg_fields;
void (*enable_intr)(int pin_out, bool on);
void (*unmask_gpio)(int pin_out, bool on);
void (*clear_gpio)(int pin_out);
};
like look at her. thirteen fields. main character struct energy π
π Members π
baseβ the PDC base register for DRV2 / HLOS. this is the home base, the headquarters, the where it all happens πprev_baseβ the PDC DRV1 base, and heads up: it's applicable only for the x1e RTL bug π like it's a special-case field, not a general-purpose one, ok?versionβ the PDC version. which era of PDC are we in, iykyknum_spisβ total number of direct SPI interrupts π―regionβ the PDC interrupt continuous rangeregion_cntβ total PDC ranges, yes total, don't @ mex1e_quirkβ x1e H/W Bug handling. it's literally a bool for "we have to deal with the hardware bug" πmodeβPDC_PASS_THROUGH_MODEorPDC_SECONDARY_MODE. pick one bestie, it's a whole vibe check πlockβ the lock forIRQ_ENABLE_BANKprotection π protect her at all costsregsβ PDC regs (IRQ_ENABLE_BANKandIRQ_CFG)cfg_fieldsβ the fields of theIRQ_CFGregenable_intrβ pointer to the enable function, and it's chosen based on PDC version. version-dependent function pointer, so fetch πunmask_gpioβ pointer to the GPIO irq unmask functionclear_gpioβ pointer to the GPIO irq clear function
β SEE ALSO β
go read these next, bestie, they're the whole friend group π«Ά
- Kernel file
./drivers/irqchip/qcom-pdc.c struct pdc_regs(9)struct pdc_irq_cfg(9)qcom_pdc_gic_set_type(9)qcom_pdc_gic_secondary_set_type(9)
ngl this struct is basically a little dashboard for the PDC driver: where the registers live, which version we're on, how many SPIs and regions there are, whether the x1e hardware bug needs handling, which mode we're in, a lock guarding IRQ_ENABLE_BANK, the register and config-field descriptors, plus three function pointers that get swapped around depending on version and purpose. iconic behavior honestly π
and that's the page!! brought to you straight out of ./drivers/irqchip, dated October 2026 β see you in the future bestie, mwah ππβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms