STRUCT PCS_DEVICE(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

struct pcs_device(9) β€” the Kernel API Manual, but make it a vibe πŸ’…βœ¨

NAME πŸŽ€

struct pcs_device β€” pinctrl device instance. That's the name, bestie: it's the struct for a pinctrl device instance. πŸ‘‘

SYNOPSIS πŸ¦‹

Okay so here's the full struct, no edits, no cap β€” every field and define exactly as it lives:

       struct pcs_device {
           struct resource *res;
           void __iomem *base;
           void *saved_vals;
           unsigned size;
           struct device *dev;
           struct device_node *np;
           struct pinctrl_dev *pctl;
           unsigned flags;
         #define PCS_CONTEXT_LOSS_OFF    (1 << 3);
         #define PCS_QUIRK_SHARED_IRQ    (1 << 2);
         #define PCS_FEAT_IRQ            (1 << 1);
         #define PCS_FEAT_PINCONF        (1 << 0);
           struct property *missing_nr_pinctrl_cells;
           struct pcs_soc_data socdata;
           raw_spinlock_t lock;
           struct mutex mutex;
           unsigned width;
           unsigned fmask;
           unsigned fshift;
           unsigned foff;
           unsigned fmax;
           bool bits_per_mux;
           unsigned bits_per_pin;
           struct pcs_data pins;
           struct list_head gpiofuncs;
           struct list_head irqs;
           struct irq_chip chip;
           struct irq_domain *domain;
           struct pinctrl_desc desc;
           unsigned (*read)(void __iomem *reg);
           void (*write)(unsigned val, void __iomem *reg);
        };

Members πŸ’–

Every member gets its lil moment, because the whole cast matters:

  • res β€” resources.
  • base β€” virtual address of the controller.
  • saved_vals β€” saved values for the controller.
  • size β€” size of the ioremapped area.
  • dev β€” device entry.
  • np β€” device tree node.
  • pctl β€” pin controller device.
  • flags β€” mask of PCS_FEAT_xxx values.
  • missing_nr_pinctrl_cells β€” for legacy binding, may go away. Lowkey don't get too attached, but that's literally what the page says.
  • socdata β€” soc specific data.
  • lock β€” spinlock for register access.
  • mutex β€” mutex protecting the lists.
  • width β€” bits per mux register.
  • fmask β€” function register mask.
  • fshift β€” function register shift.
  • foff β€” value to turn mux off.
  • fmax β€” max number of functions in fmask.
  • bits_per_mux β€” number of bits per mux.
  • bits_per_pin β€” number of bits per pin.
  • pins β€” physical pins on the SoC.
  • gpiofuncs β€” list of gpio functions.
  • irqs β€” list of interrupt registers.
  • chip β€” chip container for this instance.
  • domain β€” IRQ domain for this instance.
  • desc β€” pin controller descriptor.
  • read β€” register read function to use.
  • write β€” register write function to use.

SEE ALSO 🌈

The kernel file is ./drivers/pinctrl/pinctrl-single.c, and these are the linked faves β€” go read them, iykyk:


πŸŽ€ Source/version: ./drivers/pinctrl Β· date: October 2026 Β· manual: Kernel API Manual. Cute sign-off complete, bestie β€” periodt. πŸ’–
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