STRUCT PCI_BRIDGE_REG_BEHAVIOR(9)
π NAME π
okay so bestie, this whole page is about struct pci_bridge_reg_behavior β register bits behaviors π
. It's part of the Kernel API Manual, and the page title is literally struct pci_bridge_reg_behavior(9).
β¨ SYNOPSIS β¨
Here's the struct, served fresh and exact:
struct pci_bridge_reg_behavior {
u32 ro;
u32 rw;
u32 w1c;
};
π«Ά Members π«Ά
roβ Read-Only bits. Look but do not touch, bestie π«Ά.rwβ Read-Write bits. Read 'em, write 'em, slay β¨.w1cβ Write-1-to-Clear bits. The name says it all, iykyk π .
π DESCRIPTION π
Reads and Writes will be filtered by specified behavior. All other bits not declared are assumed 'Reserved' and will return 0 on reads. That's not me being dramatic β it's per PCIe 5.0:
"Reserved register fields must be read only and must return 0 (all 0's for multi-bit fields) when read".
So yeah, the undeclared bits are Reserved with a capital R, and they give you 0 when read ππ.
π SEE ALSO π
- Kernel file
./drivers/pci/pci-bridge-emul.cβ the lore is right there, go read it ππ.
π xoxo, bestie β source/version: ./drivers/pci Β· date: October 2026 Β· footer title: struct pci_b...reg_behavior(9).
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms