STRUCT MTK_PHY_PDATA(9)

💅 struct mtk_phy_pdata 💅

okay bestie, welcome to the Kernel API Manual, section 9 — this is the whole page for struct mtk_phy_pdata, which is literally just SoC specific platform data ✨. it's the little bundle of settings that tells the MediaTek PHY driver how your particular chip wants to be handled. no cap, it's small but it's doing a lot of work 🫶

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🌸 NAME 🌸

struct mtk_phy_pdata — SoC specific platform data 💖

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⭐ SYNOPSIS ⭐

here's the whole struct, character for character, do not touch:

struct mtk_phy_pdata {
    bool avoid_rx_sen_degradation;
    bool sw_pll_48m_to_26m;
    bool sw_efuse_supported;
    u8 slew_ref_clock_mhz;
    u8 slew_rate_coefficient;
    enum mtk_phy_version version;
 };

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🎀 Members 🎀

okay so these are the fields, and each one has main character energy in its own way 👑

avoid_rx_sen_degradation

Avoid TX Sensitivity level degradation — and this is MT6795/8173 only, so if you're on some other SoC, this one's not for you bestie 🙈

sw_pll_48m_to_26m

a workaround for the V3 IP (MT8195) — it switches the 48MHz PLL from fractional mode to integer so it can output 26MHz for U2PHY 🔥 literally just vibes and clock math.

sw_efuse_supported

this one switches off eFuse auto-load from the PHY, and instead applies values read from a different nvmem (usually a different eFuse array) — the one that's pointed at in the device tree node for this PHY 🌈 iykyk.

slew_ref_clock_mhz

the default reference clock, in MHz, for slew rate calibration 🕰️

slew_rate_coefficient

the coefficient for slew rate calibration — yes it pairs with the one above, they're a matching set 💜

version

the PHY IP Version 🦋

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✨ SEE ALSO ✨

• Kernel file ./drivers/phy/mediatek/phy-mtk-tphy.c — go read it, it's where all this actually gets used, fr fr 📖

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bestie reminder: if you're editing this struct, every field is load-bearing. don't just delete one because the vibe check failed 💀

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and that's the page!! 🎀 from ./drivers/phy/mediatek, dated October 2026 — mwah, take care of your PHY pdata, ily 🌸💖🦋