STRUCT MTK_PCIE_PORT(9)

🌸 NAME 🌸

okay so bestie, this is the struct mtk_pcie_port page from the Kernel API Manual — it's literally just "PCIe port information" ✨ like that's the whole vibe, one single port, all its clocks and IRQs and everything, wrapped up in one struct 💅

✨ SYNOPSIS ✨

here's the whole thing, character for character, no cap:

struct mtk_pcie_port {
    void __iomem *base;
    phys_addr_t phys_base;
    struct list_head list;
    struct mtk_pcie *pcie;
    struct reset_control *reset;
    struct clk *sys_ck;
    struct clk *ahb_ck;
    struct clk *axi_ck;
    struct clk *aux_ck;
    struct clk *obff_ck;
    struct clk *pipe_ck;
    struct phy *phy;
    u32 slot;
    int irq;
    struct irq_domain *irq_domain;
    struct irq_domain *inner_domain;
    struct mutex lock;
    unsigned long msi_irq_in_use[BITS_TO_LONGS( MTK_MSI_IRQS_NUM)];
};

💅 Members 💅

okay let's go through these one by one, grab a snack 🍓

• base — IO mapped register base. where the registers actually live in memory, mapped in 🗺️
• phys_base — Physical address of the I/O register base region. the real, physical address, not the mapped-in one, iykyk
• list — port list. it's a list_head, so this port is chained up with the others 🔗
• pcie — pointer to PCIe host info. it points back at the bigger mtk_pcie situation 👑
• reset — pointer to port reset control. this one's the reset handle for the port 🌀
• sys_ck — pointer to transaction/data link layer clock. the transaction / data link layer clock ⏰
• ahb_ck — pointer to AHB slave interface operating clock for CSR access and RC initiated MMIO access. so it's the AHB slave interface operating clock, and it covers CSR access and RC-initiated MMIO access, both 🫶
• axi_ck — pointer to application layer MMIO channel operating clock. the application layer MMIO channel clock 🚀
• aux_ck — pointer to pe2_mac_bridge and pe2_mac_core operating clock when pcie_mac_ck/pcie_pipe_ck is turned off. ok so this one is the pe2_mac_bridge and pe2_mac_core operating clock, and specifically for when pcie_mac_ck/pcie_pipe_ck is turned off 💀
• obff_ck — pointer to OBFF functional block operating clock. yep, the OBFF functional block's clock ✨
• pipe_ck — pointer to LTSSM and PHY/MAC layer operating clock. the LTSSM and PHY/MAC layer clock, she does a lot 🌈
• phy — pointer to PHY control block. points at the PHY control block 🧚
• slot — port slot. it's a u32, it's the port's slot number 🔢
• irq — GIC irq. an int, and it's the GIC irq 🚨
• irq_domain — legacy INTx IRQ domain. legacy INTx, periodt 🎀
• inner_domain — inner IRQ domain. the inner one 🌀
• lock — protect the msi_irq_in_use bitmap. it's a struct mutex, and its whole job is guarding that bitmap 🔒
• msi_irq_in_use — bit map for assigned MSI IRQ. typed unsigned long msi_irq_in_use[BITS_TO_LONGS( MTK_MSI_IRQS_NUM)] — one bit per MSI IRQ, tracking what's assigned 💖

🎀 SEE ALSO 🎀

go read these next, bestie, they're all in Kernel file ./drivers/pci/controller/pcie-mediatek.c:

• enum mtk_pcie_quirks(9)
• struct mtk_pcie_soc(9)
• struct mtk_pcie(9)
• mtk_pcie_retrain(9)

and that's the whole page, no notes 💅 this cutie lives in ./drivers/pci/controller, dated October 2026, and it's struct mtk_pcie_port(9) all day long — go read the source and slay 🫶✨