STRUCT MTK_PCIE_PHY(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 NAME 🌸

okay bestie, welcome to the Kernel API Manual β€” section 9 ofc β€” and today's main character is struct mtk_pcie_phy, which is literally the main structure of the PCIe phy driver. like, THE structure. periodt. πŸ’…


✨ SYNOPSIS ✨

here's the whole glow-up, no notes:

struct mtk_pcie_phy {
    struct device *dev;
    struct phy *phy;
    void __iomem *sif_base;
    const struct mtk_pcie_phy_data *data;
    bool sw_efuse_en;
    u32 efuse_glb_intr;
    struct mtk_pcie_lane_efuse *efuse;
};

🫢 Members 🫢

okay so let's meet the cast, one member at a time πŸŽ€

  • dev β€” pointer to device. iconic. the anchor of the whole friend group πŸ’–
  • phy β€” pointer to generic phy. the actual phy bestie, very demure, very mindful πŸ¦‹
  • sif_base β€” IO mapped register base address of system interface. this is where the registers live, like the group chat of memory 🏠
  • data β€” pointer to SoC dependent data. so every SoC gets to be its own unique little self, no cap πŸ“
  • sw_efuse_en β€” software eFuse enable status. it's a bool, it's giving yes/no, on/off, slay/fail ✨
  • efuse_glb_intr β€” internal resistor selection of TX bias current data. lowkey a mouthful but it's literally just telling you what that u32 is for πŸ’€
  • efuse β€” pointer to eFuse data for each lane. every lane gets its own eFuse moment, we love lane equality πŸ‘‘

πŸ‘€ SEE ALSO πŸ‘€

go read these next, i'm obsessed:

  • Kernel file ./drivers/phy/mediatek/phy-mtk-pcie.c struct mtk_pcie_lane_efuse(9), struct mtk_pcie_phy_data(9), mtk_pcie_phy_init(9) β€” the whole friend group fr fr 🫢

and that's the page bestie!! πŸ’œ this came from ./drivers/phy/mediatek, dated October 2026 β€” screenshot it, memorize it, cite it in your next patch. you're gonna slay the vibe check β­πŸŒˆπŸŽ€

πŸ“¦ where this page comes from