STRUCT MTK_MMSYS_DRIVER_DATA(9)

🌸 NAME 🌸

struct mtk_mmsys_driver_data — literally the settings of the mmsys, that's the whole vibe 💅

This is a page from the Kernel API Manual, section 9, bestie. Buckle up 🎀

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✨ SYNOPSIS ✨

struct mtk_mmsys_driver_data {
    const char *clk_driver;
    const struct mtk_mmsys_routes *routes;
    const unsigned int num_routes;
    const u16 sw0_rst_offset;
    const u8 *rst_tb;
    const u32 num_resets;
    const bool is_vppsys;
    const u8 vsync_len;
 };

Like, that's the whole struct, and it's giving "small but iconic" ✨

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🫶 Members 🫶

• clk_driver — the name of the clock driver that the mmsys is using. It's defined over in drivers/clk/mediatek/clk-*.c, iykyk 💖
• routes — the routing table of the mmsys. Basically it hands you the mux settings that go from one module to another 🔀
• num_routes — the array size of the routes. Yes bestie, the count. It's a count 😌
• sw0_rst_offset — the register offset for the reset control ⭐
• num_resets — how many reset bits are defined. That's it. That's the number 🎀
• is_vppsys — whether the mmsys is VPPSYS (Video Processing Pipe) or VDOSYS (Video). Only VDOSYS needs to be added to the drm driver, so pay attention here 👀
• vsync_len — the VSYNC length of the MIXER. Okay so this one needs a whole story, grab a snack 🍓
  • VSYNC is usually triggered by the connector, so its length is a fixed value once the frame rate is decided. Simple, right?
  • BUT ETHDR and MIXER generate their own VSYNC because of the hardware design, so MIXER has to sync with ETHDR by adjusting the VSYNC length. Teamwork fr fr 🫶
  • On MT8195 there's no such setting, so they use the gap between the falling edge and the rising edge of the SOF (Start of Frame) signal to do the job. Respect the hustle, but also 😭
  • Since MT8188 though? VSYNC_LEN setting was introduced to solve the problem, and it's given 0x40 (ticks) as the default value. Slay ✨
  • > ⚠️ Heads up, and this part is important: this value has to be set to 1 (minimum) if ETHDR is bypassed. Otherwise MIXER could wait too long and cause underflow 💀 no cap, don't skip this one.

Quick honest note: rst_tb is chillin' in the struct up there but the page never describes it, so I'm not gonna make stuff up about it 🙈

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💜 Description 💜

Each MMSYS (multi-media system) may have different settings. They may use different clock sources, different mux settings, different reset control, ...etc., and all of those differences are stored right here in this struct. It's basically the group chat of "every mmsys is a little different" and this struct is where all the lore lives 👑

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🦋 SEE ALSO 🦋

• Kernel file ./drivers/soc/mediatek/mtk-mmsys.h — go read it, bestie, it's right there 📖

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That's the whole page! Source path ./drivers/soc/mediatek, dated October 2026, page struct mtk_m..._driver_data(9) — mwah, hope this helped, go be a main character in the kernel 💖🧚‍♀️🌈