STRUCT MTK_GEN3_PCIE(9)

✨ struct mtk_gen3_pcie(9) — Kernel API Manual vibes ✨

okay so bestie, welcome to the struct mtk_gen3_pcie(9) page!! 💖 this is the group chat where every single box of info about one PCIe port lives — all the fields, all the resets, all the lock drama. no cap, it's all here, and we're gonna go through it together 🫶

🌸 NAME 🌸

struct mtk_gen3_pcie — literally just "PCIe port information", that's the whole vibe ✨

🎀 SYNOPSIS 🎀

struct mtk_gen3_pcie {
    struct device *dev;
    void __iomem *base;
    phys_addr_t reg_base;
    struct reset_control *mac_reset;
    struct reset_control_bulk_data phy_resets[MAX_NUM_PHY_RESETS];
    struct phy *phy;
    struct clk_bulk_data *clks;
    int num_clks;
    u8 max_link_speed;
    u8 num_lanes;
    int irq;
    u32 saved_irq_state;
    raw_spinlock_t irq_lock;
    struct irq_domain *intx_domain;
    struct irq_domain *msi_bottom_domain;
    struct mtk_msi_set msi_sets[PCIE_MSI_SET_NUM];
    struct mutex lock;
    unsigned long msi_irq_in_use[BITS_TO_LONGS( PCIE_MSI_IRQS_NUM)];
    const struct mtk_gen3_pcie_pdata *soc;
 };

like, look at her. she's got everything 💅

💜 Members 💜

• dev — pointer to the PCIe device, the main character herself 🌟
• base — IO mapped register base, where the register magic happens ✨
• reg_base — physical register base, the real-world address bestie 🗺️
• mac_reset — MAC reset control, for when things need a little reset moment 🌀
• phy_resets — PHY reset controllers (plural, she's got a whole array of them) 🔁
• phy — PHY controller block, iconic hardware energy 🦋
• clks — PCIe clocks, we love a timely queen ⏰
• num_clks — PCIe clocks count for this port, the receipts 🔢
• max_link_speed — maximum link speed (PCIe Gen) for this port, she's fast fr fr 🏎️
• num_lanes — number of PCIe lanes for this port, staying in her lane(s) 💅
• irq — PCIe controller interrupt number, the interrupt's own little id 🆔
• saved_irq_state — IRQ enable state saved at suspend time, so she remembers where she left off 😴
• irq_lock — lock protecting IRQ register access, no cutting in line 🔒
• intx_domain — legacy INTx IRQ domain, the old-school icon 👑
• msi_bottom_domain — MSI IRQ bottom domain, bottom but still thriving 🙈
• msi_sets — MSI sets information, the whole collection 🎀
• lock — lock protecting IRQ bit map, another lock, she's careful okay 😭
• msi_irq_in_use — bit map for assigned MSI IRQ, tracking who's taken 👀
• soc — pointer to SoC-dependent operations, the plot twists live here 🌈

🦋 SEE ALSO 🦋

• ./drivers/pci/controller/pcie-mediatek-gen3.c
• struct mtk_gen3_pcie_pdata(9)
• struct mtk_msi_set(9)
• mtk_pcie_config_tlp_header(9)
• mtk_intx_eoi(9)

go read those too, iykyk 📚✨

that's the whole page bestie, you ate that 🍓💖 this came to you from ./drivers/pci/controller, dated October 2026 — mwah, slay, periodt 💅🎀🔥