STRUCT MSM_PINGROUP(9)

🌸 NAME 🌸

struct msm_pingroup — it's the Qualcomm pingroup definition, bestie. Like, the whole blueprint for how one pin group works on those SoCs 💅

(oh also — hi, you're reading the Kernel API Manual, section 9, and it's struct msm_pingroup time 🫶)

✨ SYNOPSIS ✨

struct msm_pingroup {
    struct pingroup grp;
    unsigned *funcs;
    unsigned nfuncs;
    u32 ctl_reg;
    u32 io_reg;
    u32 intr_cfg_reg;
    u32 intr_status_reg;
    u32 intr_target_reg;
    unsigned int tile:2;
    unsigned mux_bit:5;
    unsigned pull_bit:5;
    unsigned drv_bit:5;
    unsigned i2c_pull_bit:5;
    unsigned od_bit:5;
    unsigned egpio_enable:5;
    unsigned egpio_present:5;
    unsigned oe_bit:5;
    unsigned in_bit:5;
    unsigned out_bit:5;
    unsigned intr_enable_bit:5;
    unsigned intr_status_bit:5;
    unsigned intr_ack_high:1;
    unsigned intr_wakeup_present_bit:5;
    unsigned intr_wakeup_enable_bit:5;
    unsigned intr_target_bit:5;
    unsigned intr_target_width:5;
    unsigned intr_target_kpss_val:5;
    unsigned intr_raw_status_bit:5;
    unsigned intr_polarity_bit:5;
    unsigned intr_detection_bit:5;
    unsigned intr_detection_width:5;
};

look at her. the bitfields. the u32s. she's thriving ✨ and honestly? she ate. no notes 💀

🎀 Members 🎀

okay so here's the rundown the page actually gives you, field by field — nothing skipped, no gatekeeping 💖

• grp — the generic data of the pin group, aka the name and the pins. the vibe check of the struct 🌸
• funcs — a list of pinmux functions that can be selected for this group. the index of the selected function is what gets used for programming the function selector. and lowkey important: entries should be indices into the groups list of the struct msm_pinctrl_soc_data 👑
• ctl_reg — offset of the register holding the control bits for this group.
• io_reg — offset of the register holding the input/output bits for this group.
• intr_cfg_reg — offset of the register holding the interrupt configuration bits.
• intr_status_reg — offset of the register holding the status bits for this group.
• intr_target_reg — offset of the register specifying routing of the interrupts from this group. on most SoCs this register is the same as intr_cfg_reg; leaving this field as zero causes the driver to fall back to intr_cfg_reg automatically. only set this explicitly on older SoCs where the interrupt target routing lives in a separate register (e.g. APQ8064, MSM8960). like, don't be extra for no reason, fr fr 🙈
• mux_bit — offset in ctl_reg for the pinmux function selection.
• pull_bit — offset in ctl_reg for the bias configuration.
• drv_bit — offset in ctl_reg for the drive strength configuration.
• od_bit — offset in ctl_reg for controlling open drain.
• oe_bit — offset in ctl_reg for controlling output enable.
• in_bit — offset in io_reg for the input bit value.
• out_bit — offset in io_reg for the output bit value.
• intr_enable_bit — offset in intr_cfg_reg for enabling the interrupt for this group.
• intr_status_bit — offset in intr_status_reg for reading and acking the interrupt status.
• intr_wakeup_present_bit — offset in intr_target_reg specifying the GPIO can generate wakeup events.
• intr_wakeup_enable_bit — offset in intr_target_reg to enable wakeup events for the GPIO.
• intr_target_bit — offset in intr_target_reg for configuring the interrupt routing.
• intr_target_width — number of bits used for specifying the interrupt routing target.
• intr_target_kpss_val — value in intr_target_bit for specifying that the interrupt from this gpio should get routed to the KPSS processor. sending it home to KPSS 🏠
• intr_raw_status_bit — offset in intr_cfg_reg for the raw status bit.
• intr_polarity_bit — offset in intr_cfg_reg for specifying the polarity of the interrupt.
• intr_detection_bit — offset in intr_cfg_reg for specifying the interrupt type.
• intr_detection_width — number of bits used for specifying the interrupt type. should be 2 for SoCs that can detect both edges in hardware, otherwise 1. that's it, that's the whole rule 🦋

🦋 SEE ALSO 🦋

go look at the kernel file ./drivers/pinctrl/qcom/pinctrl-msm.h, plus struct msm_gpio_wakeirq_map(9) and struct msm_pinctrl_soc_data(9). iykyk, they're all holding hands 🫶

and that's the page!! 💅✨ shoutout to the source living its best life in ./drivers/pinctrl/qcom, dated October 2026 — iconic, no cap, see u in the kernel tree bestie 🎀💜