STRUCT MSM_PINCTRL_SOC_DATA(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

okay so struct msm_pinctrl_soc_data β€” it's the Qualcomm pin controller driver configuration struct, bestie. that's literally the whole thing. this page lives in the Kernel API Manual, section 9, and it's here to tell u what every single field of this struct means 🫢


✨ SYNOPSIS ✨

like, here's the actual struct, copy it exactly, no cap:

struct msm_pinctrl_soc_data {
    const struct pinctrl_pin_desc *pins;
    unsigned npins;
    const struct pinfunction *functions;
    unsigned nfunctions;
    const struct msm_pingroup *groups;
    unsigned ngroups;
    unsigned ngpios;
    bool pull_no_keeper;
    const char *const *tiles;
    unsigned int ntiles;
    const int *reserved_gpios;
    const struct msm_gpio_wakeirq_map *wakeirq_map;
    unsigned int nwakeirq_map;
    bool wakeirq_dual_edge_errata;
    unsigned int gpio_func;
    unsigned int egpio_func;
 };

πŸŽ€ Members πŸŽ€

okay so field by field, let's go πŸ‘‘

  • pins β€” an array that describes all the pins the pin controller affects. all of them. the whole cast πŸ’…
  • npins β€” the number of entries in pins. yes it's the count. yes it's a separate field. we love a matching pair.
  • functions β€” an array describing all the mux functions the SoC supports ✨
  • nfunctions β€” the number of entries in functions.
  • groups β€” an array describing all the pin groups the pin SoC supports.
  • ngroups β€” the number of entries in groups. (the original page literally spells it "numbmer" and honestly? iconic typo behavior, we're keeping the energy but not the spelling 😭)
  • ngpios β€” it's in the struct, bestie. it's sitting right there between ngroups and pull_no_keeper looking pretty.
  • pull_no_keeper β€” a bool, and if it's set, the SoC does not support keeper bias. no keeper. none. periodt.
  • tiles β€” a const char *const * array of tiles. it's in the struct, it's part of the vibe.
  • ntiles β€” unsigned int, the number of tiles.
  • reserved_gpios β€” a const int * of reserved GPIOs.
  • wakeirq_map β€” the map of wakeup capable GPIOs and the pin at PDC/MPM πŸ”₯
  • nwakeirq_map β€” the number of entries in wakeirq_map.
  • wakeirq_dual_edge_errata β€” if this is true then GPIOs using the wakeirq_map need to be aware that their parent can't handle dual edge interrupts. like, that's the whole warning. be aware. πŸ™ˆ
  • gpio_func β€” which function number is GPIO (usually 0).
  • egpio_func β€” if non-zero then this SoC supports eGPIO. and okay this one needs the full explanation so listen up: even though in hardware this is a mux 1-level above the TLMM, we'll treat it as if this is just another mux state of the TLMM. since it doesn't really map to hardware, we'll allocate a virtual function number for eGPIO, and any time we see that function number used we'll treat it as a request to mux away from our TLMM towards another owner. that's the deal, no notes πŸ’€

ngl some of these fields (ngpios, tiles, ntiles, reserved_gpios) show up in the struct up top but don't get their own little description down here β€” that's just how the page is, don't come for me, i'm reporting faithfully 🫑

🌈 SEE ALSO 🌈

  • Kernel file ./drivers/pinctrl/qcom/pinctrl-msm.h
  • struct msm_pingroup(9)
  • struct msm_gpio_wakeirq_map(9)

go read those next, bestie, iykyk πŸ¦‹


and that's the page!! mwah πŸ’‹ this came from ./drivers/pinctrl/qcom, dated October 2026, and it's struct msm_pinctrl_soc_data(9) all the way down. slay, go configure some pins 🌸✨

πŸ“¦ where this page comes from