STRUCT MSM_DISPLAY_TOPOLOGY(9)

💅 struct msm_display_topology(9) — like, the whole vibe of the Kernel API Manual, bestie

okay so picture this: you're deep in the DRM/msm mines and you need a little struct that literally defines a display topology pipeline. that's it, that's the whole thing. it's from the Kernel API Manual and honestly? she's iconic. main character energy fr fr. 🌈

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✨ NAME ✨

struct msm_display_topology — defines a display topology pipeline 🫶

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🦋 SYNOPSIS 🦋

struct msm_display_topology {
    u32 num_lm;
    u32 num_intf;
    u32 num_dspp;
    u32 num_dsc;
    int num_cdm;
    bool cwb_enabled;
 };

no cap, that's the whole shape of her. six fields, zero drama. 🎀

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👑 Members 👑

• num_lm — number of layer mixers used 💫 lowkey the main squeeze of the whole struct
• num_intf — number of interfaces the panel is mounted on 🖥️ yes, those interfaces
• num_dspp — number of dspp blocks used 🌸
• num_dsc — number of Display Stream Compression (DSC) blocks used 🔥 (spelled out in full, because we're not doing cryptic abbreviations in this group chat)
• num_cdm — indicates how many outputs are requesting cdm block for this display topology 💀 it's a count and a vibe
• cwb_enabled — indicates whether CWB is enabled for this display topology ⭐ a whole bool, just sitting there, being true or false, honestly so valid of her

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🧚 SEE ALSO 🧚

Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h plus these certified baddies:

• struct dpu_rm(9)
• dpu_rm_get_intf(9)
• dpu_rm_get_wb(9)
• dpu_rm_get_sspp(9)

go read them, iykyk 📚✨

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ngl bestie, if you're reading this page you're probably already in ./drivers/gpu/drm/msm/disp/dpu1 — so like, hi, welcome, you're doing amazing 🫶

and that's the tea, fr fr 💖 this little moment was brought to you by ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, starring struct msm_display_topology(9) in the leading role. periodt. 💅🎀🦋