STRUCT MOD_CLOCK(9)

💖 struct mod_clock(9) 💖

okay so welcome to the Kernel API Manual, bestie 🫶 this little page is all about struct mod_clock — literally just "Module clock", that's the whole NAME. cute, right? ✨

🌸 SYNOPSIS 🌸

Like, here's the whole vibe of the struct, no notes, character for character:

struct mod_clock {
    struct rzv2h_cpg_priv *priv;
    unsigned int mstop_data;
    struct clk_hw hw;
    bool no_pm;
    u8 on_index;
    u8 on_bit;
    s8 mon_index;
    u8 mon_bit;
    s8 ext_clk_mux_index;
 };

no cap, that's it. now let's meet the cast 💅

🎀 Members 🎀

• priv — the CPG private data. it's giving "everything you need to know lives in here" energy 👑
• mstop_data — the mstop data that relates to the module clock. mstop things, module clock things, you get it 🦋
• hw — the handle between the common interfaces and the hardware-specific ones. literally the middleman, the main character connecting both worlds 🌈
• no_pm — a flag that says PM is not supported. so if this is set, don't come asking about power management, bestie 🙈
• on_index — the register offset. a simple u8, living its best life ⭐
• on_bit — the ON/MON bit. yes, both. one field, two jobs, iconic 🔥
• mon_index — the monitor register offset. note it's an s8 this time, not a u8 — the way that type changes 💀
• mon_bit — the monitor bit. we love a u8 💜
• ext_clk_mux_index — the mux index for the external clock source, or -1 if it's internal. so -1 is the "nah, it's internal" signal, and that's exactly why it's an s8 🧚

✨ SEE ALSO ✨

go look at the kernel file ./drivers/clk/renesas/rzv2h-cpg.c struct, and also these absolute legends:

• rzv2h_pll_dsi_info(9)
• struct rzv2h_cpg_priv(9)
• struct ddiv_clk(9)
• struct rzv2h_ff_mod_status_clk(9)
• struct rzv2h_plldsi_div_clk(9)
• struct rzv2h_plldsi_mux_clk(9)
• struct rzv2h_cpg_pd(9)

iykyk 🍓

ok that's the whole page, no crumbs left behind, everything preserved fr fr 💖

and that's a wrap, bestie! this one comes to you from ./drivers/clk/renesas and it's dated October 2026 — slay, periodt 👑🎀