STRUCT MLX5_FPGA_DMA_BUF(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct mlx5_fpga_dma_buf(9) ✨

okay bestie, welcome to the Kernel API Manual πŸ’– this lil page is literally all about struct mlx5_fpga_dma_buf and it's giving peak main-character energy for your packet buffers, no cap πŸŽ€


🌸 NAME 🌸

struct mlx5_fpga_dma_buf β€” a packet buffer, and the way it may contain up to 2 scatter-gather data entries. that's it. two. iconic minimalism honestly πŸ¦‹


✨ SYNOPSIS ✨

struct mlx5_fpga_dma_buf {
    enum dma_data_direction dma_dir;
    struct mlx5_fpga_dma_entry sg[2];
    struct list_head list;
    void (*complete)(struct mlx5_fpga_conn *conn, struct mlx5_fpga_device *fdev, struct mlx5_fpga_dma_buf *buf, u8 status);
};

like… look at her. the whole struct. stunning πŸ’…


πŸ‘‘ Members πŸ‘‘

  • dma_dir β€” the DMA direction, aka which way the data is vibing 🧭
  • sg β€” scatter-gather entries that point to the data in memory. it's an array, bestie, and it holds up to 2 entries 🌈
  • list β€” this one's an item in the SQ backlog, specifically for TX packets πŸ“¬
  • complete β€” the completion routine, also for TX packets. and omg it has its own lil squad of parameters, let me break it down for u 🫢
    • conn: FPGA Connection this packet was sent to
    • fdev: FPGA device this packet was sent to
    • buf: The packet buffer
    • status: 0 if successful, or an error code otherwise

πŸ’œ SEE ALSO πŸ’œ

like go read those too, they're all part of the friend group fr fr πŸ’€πŸ”₯


aaaand that's the whole page, bestie!! πŸŽ€ this one came from ./drivers/net/ethernet/mellano... and it's dated October 2026, so yeah β€” go forth and buffer those packets, you absolute icon πŸ‘‘πŸ’–

πŸ“¦ where this page comes from