STRUCT MARVELL_NFC_TIMINGS(9)
π struct marvell_nfc_timings(9) π
β¨ NAME β¨
okay so struct marvell_nfc_timings β straight out of the Kernel API Manual β is giving NAND controller timings expressed in NAND Controller clock cycles. thatβs the whole vibe: timing values, clock cycles, NAND controller. no cap. π
π¦ SYNOPSIS π¦
struct marvell_nfc_timings {
unsigned int tRP;
unsigned int tRH;
unsigned int tWP;
unsigned int tWH;
unsigned int tCS;
unsigned int tCH;
unsigned int tADL;
unsigned int tAR;
unsigned int tWHR;
unsigned int tRHW;
unsigned int tR;
};
look at her. iconic struct energy, all unsigned int fields, absolutely serving kernel API realness. π
π Members π
tRPβND_nREpulse width. literally the pulse width, bestie. β¨tRHβND_nREhigh duration. how long it stays high, periodt.tWPβND_nWEpulse time. yes, pulse time. π©·tWHβND_nWEhigh duration. high-key just the high duration.tCSβ enable signal setup time. setup era. πtCHβ enable signal hold time. hold it, hold it. πtADLβ address to write data delay. the delay from address to write data.tARβND_ALElow toND_nRElow delay. low-to-low delay, iykyk.tWHRβND_nWEhigh toND_nRElow for status read. status-read specific, no cap. πΈtRHWβND_nREhigh duration, read to write delay. two things at once, main character energy. πtRβND_nWEhigh toND_nRElow for read. read-specific, slay.
π SEE ALSO π
bestie, if youβre going deeper, the kernel file is ./drivers/mtd/nand/raw/marvell_nand.c, and these are the linked faves:
struct marvell_hw_ecc_layout(9)struct marvell_nand_chip_sel(9)struct marvell_nand_chip(9)struct marvell_nfc_caps(9)struct marvell_nfc(9)TO_CYCLES(9)struct marvell_nfc_op(9)
and thatβs the cute little sign-off: this page is from the Kernel API Manual, source path ./drivers/mtd/nand/raw, dated October 2026, and itβs the page for struct marvell_nfc_timings(9). go off, bestie π«Άβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms