STRUCT MARVELL_NAND_CHIP(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’œ struct marvell_nand_chip(9) β€” like, the whole vibe check on a NAND chip πŸ’œ

okay bestie, sit down, hydrate, and let me tell you about struct marvell_nand_chip from the Kernel API Manual β€” it's the struct that stores NAND chip device related information, and honestly? it's giving main character energy. ✨


🌸 NAME 🌸

struct marvell_nand_chip β€” stores NAND chip device related information πŸŽ€

no cap, that's the whole pitch. it holds all the deets about a NAND chip device. periodt. πŸ’…


✨ SYNOPSIS ✨

here's the glow-up, laid out exactly as the kernel gods wrote it:

struct marvell_nand_chip {
    struct nand_chip chip;
    struct list_head node;
    const struct marvell_hw_ecc_layout *layout;
    u32 ndcr;
    u32 ndtr0;
    u32 ndtr1;
    int addr_cyc;
    int selected_die;
    unsigned int nsels;
    struct marvell_nand_chip_sel sels[];
};

look at her. all those fields. iconic. πŸ”₯


πŸ¦‹ Members πŸ¦‹

okay so this is the part where we meet the cast, one by one β€” every single one of them, no skipping, i promise 🫢

  • chip β€” the base NAND chip structure πŸ’– like, the foundation, the blueprint, the main character's backstory.
  • node β€” used to store NAND chips into a list πŸ“‹ everything's in a list, bestie. everything.
  • layout β€” the NAND layout used when you're doing hardware ECC ⚑ fancy hardware mode activated.
  • ndcr β€” the controller register value for this NAND chip πŸŽ›οΈ its personal little settings corner.
  • ndtr0 β€” timing registers 0 value for this NAND chip ⏱️ timing is everything, iykyk.
  • ndtr1 β€” timing registers 1 value for this NAND chip ⏱️⏱️ yes there's a second one, she's thorough.
  • addr_cyc β€” the amount of cycles needed to pass the column address πŸ”„ count 'em.
  • selected_die β€” the current active CS πŸ‘‘ whoever's holding the crown right now.
  • nsels β€” number of CS lines required by the NAND chip πŸ”’ how many lines this chip is claiming.
  • sels β€” array of CS lines descriptions πŸŽ€ the receipts, per line.

🌈 SEE ALSO 🌈

go read these next, bestie, they're all connected (iykyk):

  • Kernel file ./drivers/mtd/nand/raw/marvell_nand.c
  • struct marvell_hw_ecc_layout(9)
  • struct marvell_nand_chip_sel(9)
  • struct marvell_nfc_caps(9)
  • struct marvell_nfc(9)
  • struct marvell_nfc_timings(9)
  • TO_CYCLES(9)
  • struct marvell_nfc_op(9)

🫢 lowkey reminder: this page lives under ./drivers/mtd/nand/raw and it's dated October 2026 β€” the manual name is struct marvell_nand_chip(9) in case you forgot already. mwah. πŸ’‹

and that's the page, bestie β€” struct marvell_nand_chip(9), ./drivers/mtd/nand/raw, October 2026, all wrapped up with a bow. slay. πŸ’…βœ¨πŸŽ€πŸ¦‹πŸ’–

πŸ“¦ where this page comes from