STRUCT LMK04832(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct lmk04832(9) ✨

okay so bestie, welcome to the Kernel API Manual πŸ’… β€” this is the page for struct lmk04832, and no cap this is literally the whole LMK04832 device structure. every field, every comment, all of it. let's go 🫢


🌸 NAME 🌸

struct lmk04832 β€” the LMK04832 device structure. that's it, that's the vibe. the main character struct itself πŸ‘‘


πŸ¦‹ SYNOPSIS πŸ¦‹

here's the whole thing laid out, exactly as written, follow along bestie:

struct lmk04832 {
    struct device *dev;
    struct regmap *regmap;
    unsigned int sync_mode;
    unsigned int sysref_mux;
    unsigned int sysref_pulse_cnt;
    unsigned int sysref_ddly;
    struct clk *oscin;
    struct clk_hw vco;
    struct clk_hw sclk;
    unsigned int vco_rate;
    struct gpio_desc *reset_gpio;
    struct lmk_dclk *dclk;
    struct lmk_clkout *clkout;
    struct clk_hw_onecell_data *clk_data;
 };

πŸŽ€ Members πŸŽ€

okay so every single member, one by one, no skipping fr fr πŸ’–

  • dev β€” your reference to a struct device, linked to the spi_device. it's giving the connection point 🌈
  • regmap β€” the struct regmap instance used to access the chip. this is how you actually talk to it ✨
  • sync_mode β€” the operational mode for the SYNC signal. pick your mode, own it πŸ’…
  • sysref_mux β€” selects the SYSREF source. it's the mux, it picks πŸ’«
  • sysref_pulse_cnt β€” the number of SYSREF pulses generated while not in continuous mode. not continuous, bestie, count your pulses πŸŽ€
  • sysref_ddly β€” the SYSREF digital delay value. yes, "ddly", that's the actual name, iconic 🧚
  • oscin β€” the PLL2 input clock. PLL2's whole input situation ⭐
  • vco β€” reference to the internal VCO clock. internal, but making it everyone's business πŸ”₯
  • sclk β€” reference to the internal sysref clock (SCLK). that's the SCLK one, capital letters, noted πŸ¦‹
  • vco_rate β€” the user provided VCO rate. user provided, so like, you did that πŸ’œ
  • reset_gpio β€” reference to the reset GPIO. the little reset guy πŸ™ˆ
  • dclk β€” a list of internal device clock references. each pair of clkout clocks share a single device clock (DCLKX_Y). sharing is caring, that's the rule πŸ’ž
  • clkout β€” a list of output clock references. outputs, plural, a whole list 🌸
  • clk_data β€” holds clkout related data like clk_hw* and the number of clocks. the data holder, the record keeper πŸ‘‘

πŸ‘‘ SEE ALSO πŸ‘‘


⚠️ friendly heads up bestie: that's everything on this page, and this page is all struct fields and cross-refs β€” nothing more, nothing less, so don't go looking for extra behavior here 😭

🌸 okay that's the page! this little cutie lives under ./drivers/clk, dated October 2026, and it's filed as struct lmk04832(9) β€” go forth and slay the clock tree πŸ’…βœ¨πŸ«Ά

πŸ“¦ where this page comes from