STRUCT KFD2KGD_CALLS(9)

💖 struct kfd2kgd_calls(9) 💖

okay so bestie, welcome to the Kernel API Manual — this one's a struct page, and honestly it's giving "backstage pass to the GPU driver" ✨

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🎀 NAME 🎀

struct kfd2kgd_calls — and yes, the tagline slot is literally empty on this one, the page just hands you the name and skips the intro. no notes. 💅

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🌸 SYNOPSIS 🌸

here's the whole struct, every function pointer, copied exactly so you can trust it:

struct kfd2kgd_calls {
    void (*program_sh_mem_settings)(struct amdgpu_device *adev, uint32_t
vmid, uint32_t sh_mem_config, uint32_t sh_mem_ape1_base, uint32_t
sh_mem_ape1_limit, uint32_t sh_mem_bases, uint32_t inst);
    int (*set_pasid_vmid_mapping)(struct amdgpu_device *adev, u32 pasid,
unsigned int vmid, uint32_t inst);
    int (*init_interrupts)(struct amdgpu_device *adev, uint32_t pipe_id,
uint32_t inst);
    int (*hqd_load)(struct amdgpu_device *adev, void *mqd, uint32_t
pipe_id, uint32_t queue_id, uint32_t __user *wptr, uint32_t wptr_shift,
uint32_t wptr_mask, struct mm_struct *mm, uint32_t inst);
    int (*hiq_mqd_load)(struct amdgpu_device *adev, void *mqd, uint32_t
pipe_id, uint32_t queue_id, uint32_t doorbell_off, uint32_t inst);
    int (*hqd_sdma_load)(struct amdgpu_device *adev, void *mqd, uint32_t
__user *wptr, struct mm_struct *mm);
    int (*hqd_dump)(struct amdgpu_device *adev, uint32_t pipe_id,
uint32_t queue_id, uint32_t (**dump)[2], uint32_t *n_regs, uint32_t
inst);
    int (*hqd_sdma_dump)(struct amdgpu_device *adev, uint32_t engine_id,
uint32_t queue_id, uint32_t (**dump)[2], uint32_t *n_regs);
    bool (*hqd_is_occupied)(struct amdgpu_device *adev, uint64_t
queue_address, uint32_t pipe_id, uint32_t queue_id, uint32_t inst);
    int (*hqd_destroy)(struct amdgpu_device *adev, void *mqd, enum
kfd_preempt_type reset_type, unsigned int timeout, uint32_t pipe_id,
uint32_t queue_id, uint32_t inst);
    bool (*hqd_sdma_is_occupied)(struct amdgpu_device *adev, void *mqd);
    int (*hqd_sdma_destroy)(struct amdgpu_device *adev, void *mqd,
unsigned int timeout);
    int (*wave_control_execute)(struct amdgpu_device *adev, uint32_t
gfx_index_val, uint32_t sq_cmd, uint32_t inst);
    bool (*get_atc_vmid_pasid_mapping_info)(struct amdgpu_device *adev,
uint8_t vmid, uint16_t *p_pasid);
    void (*set_scratch_backing_va)(struct amdgpu_device *adev, uint64_t
va, uint32_t vmid);
    void (*set_vm_context_page_table_base)(struct amdgpu_device *adev,
uint32_t vmid, uint64_t page_table_base);
    uint32_t (*read_vmid_from_vmfault_reg)(struct amdgpu_device *adev);
    uint32_t (*enable_debug_trap)(struct amdgpu_device *adev, bool
restore_dbg_registers, uint32_t vmid);
    uint32_t (*disable_debug_trap)(struct amdgpu_device *adev, bool
keep_trap_enabled, uint32_t vmid);
    int (*validate_trap_override_request)(struct amdgpu_device *adev,
uint32_t trap_override, uint32_t *trap_mask_supported);
    uint32_t (*set_wave_launch_trap_override)(struct amdgpu_device
*adev, uint32_t vmid, uint32_t trap_override, uint32_t trap_mask_bits,
uint32_t trap_mask_request, uint32_t *trap_mask_prev, uint32_t
kfd_dbg_trap_cntl_prev);
    uint32_t (*set_wave_launch_mode)(struct amdgpu_device *adev, uint8_t
wave_launch_mode, uint32_t vmid);
    uint32_t (*set_address_watch)(struct amdgpu_device *adev, uint64_t
watch_address, uint32_t watch_address_mask, uint32_t watch_id, uint32_t
watch_mode, uint32_t debug_vmid, uint32_t inst);
    uint32_t (*clear_address_watch)(struct amdgpu_device *adev, uint32_t
watch_id);
    void (*get_iq_wait_times)(struct amdgpu_device *adev, uint32_t
*wait_times, uint32_t inst);
    void (*build_dequeue_wait_counts_packet_info)(struct amdgpu_device
*adev, uint32_t wait_times, uint32_t sch_wave, uint32_t que_sleep,
uint32_t *reg_offset, uint32_t *reg_data);
    void (*get_cu_occupancy)(struct amdgpu_device *adev, struct
kfd_cu_occupancy *cu_occupancy, int *max_waves_per_cu, uint32_t inst);
    void (*program_trap_handler_settings)(struct amdgpu_device *adev,
uint32_t vmid, uint64_t tba_addr, uint64_t tma_addr, uint32_t inst);
    uint64_t (*hqd_get_pq_addr)(struct amdgpu_device *adev, uint32_t
pipe_id, uint32_t queue_id, uint32_t inst);
    uint64_t (*hqd_reset)(struct amdgpu_device *adev, uint32_t pipe_id,
uint32_t queue_id, uint32_t inst, unsigned int utimeout);
    uint32_t (*hqd_sdma_get_doorbell)(struct amdgpu_device *adev, int
engine, int queue);
    uint32_t (*ptl_ctrl)(struct amdgpu_device *adev, uint32_t cmd,
uint32_t *ptl_state, enum amdgpu_ptl_fmt *fmt1, enum amdgpu_ptl_fmt
*fmt2);
    int (*hqd_sdma_get_counter)(struct amdgpu_device *adev, void *mqd,
uint32_t num_sdma_queues_per_eng, uint64_t *val);
 };

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🦋 Members 🦋

okay so not every member got a lil blurb on this page (some of them are just out here living their truth with no description 😭), but here's everything the page does tell you, in order:

• program_sh_mem_settings — this one's job is to initiate the memory properties: think the main aperture memory type (cache / non cached) plus the secondary aperture's base address, size and memory type. heads up tho — it's only used for no cp scheduling mode.
• set_pasid_vmid_mapping — exposes the pasid/vmid pair to the H/W for no cp scheduling mode. and yeah, only used for no cp scheduling mode. iykyk.
• hqd_load — loads the mqd structure into a H/W hqd slot. used only for no cp scheduling mode.
• hqd_sdma_load — loads the SDMA mqd structure into a H/W SDMA hqd slot. used only for no HWS mode.
• hqd_dump — dumps CPC HQD registers into an array of address-value pairs. important: that array is allocated with kmalloc, so the caller has to free it with kfree. don't be the person who forgets. 🙈
• hqd_sdma_dump — dumps SDMA HQD registers into an array of address-value pairs. same story, bestie: allocated with kmalloc, caller frees with kfree.
• hqd_destroy — destructs and preempts the queue assigned to that hqd slot. it's giving cleanup era.
• hqd_sdma_is_occupied — checks if an SDMA hqd slot is occupied. yes/no vibes.
• hqd_sdma_destroy — destructs and preempts the SDMA queue assigned to that SDMA hqd slot.
• set_scratch_backing_va — sets the VA for the scratch backing memory of a VMID. only used for no cp scheduling mode.
• set_vm_context_page_table_base — programs the page table base for a VMID. short and iconic.
• read_vmid_from_vmfault_reg — okay so on Hawaii the VMID isn't set in the IH ring entry, which is lowkey a problem. this function lets the KFD ISR grab the VMID out of the fault status register as early as possible. problem solved, slay. 🔥
• get_cu_occupancy — a function pointer that returns to the caller the number of wave fronts in flight for all of the queues of a process, identified by its pasid. read this twice: the value it returns is a snapshot of the current moment and cannot guarantee any minimum for the number of waves in-flight. also it's defined for devices that belong to GFX9 and later GFX families — so be careful calling it, because it is not defined for devices in GFX8 and below GFX families. 💀

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✨ Description ✨

this structure is basically the contact list of function pointers to the services that the kgd driver provides to the amdkfd driver. that's the whole vibe. 🫶

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🌈 SEE ALSO 🌈

• ./drivers/gpu/drm/amd/include/kgd_kfd_interface.h
• enum kfd_sched_policy(9)

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and that's the page, bestie! 🎀 this lil beauty comes to you from the kernel file ./drivers/gpu/drm/amd/include, dated October 2026 — go forth and pointer-to-function responsibly 💅✨🍓