STRUCT JZ4780_DMA_HWDESC(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ¦‹ struct jz4780_dma_hwdesc(9) πŸ¦‹

okay so bestie, welcome to the Kernel API Manual (section 9) β€” this page is literally the whole vibe check for struct jz4780_dma_hwdesc, the descriptor structure that the DMA controller reads. no cap, it's iconic. πŸ’…


🌸 NAME 🌸

struct jz4780_dma_hwdesc β€” descriptor structure read by the DMA controller.

✨ SYNOPSIS ✨

struct jz4780_dma_hwdesc {
    u32 dcm;
    u32 dsa;
    u32 dta;
    u32 dtc;
 };

πŸ‘‘ Members πŸ‘‘

  • dcm β€” value for the DCM (channel command) register. she's giving command energy, fr fr.
  • dsa β€” source address. where the tea comes from, address-wise.
  • dta β€” target address. where it's headed, address-wise.
  • dtc β€” transfer count (number of blocks of the transfer size specified in DCM to transfer) in the low 24 bits, offset of the next descriptor from the descriptor base address in the upper 8 bits. yes bestie, both facts live in one field β€” low 24 bits and upper 8 bits, periodt.

πŸŽ€ SEE ALSO πŸŽ€

  • Kernel file ./drivers/dma/dma-jz4780.c β€” go peek, iykyk.

mwah πŸ’‹ source/version check: this lil page comes from ./drivers/dma, dated October 2026, and it's the struct jz4780_dma_hwdesc(9) manual page. slay and read safe 🫢

πŸ“¦ where this page comes from