STRUCT IWL_CONTEXT_INFO_V2(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct iwl_context_info_v2 β€” NAME

okay bestie so this is the manual page for struct iwl_context_info_v2 from the Kernel API Manual, and like β€” it's the device INIT configuration. that's literally the whole assignment. it's the little bundle of settings that tells the device how to set itself up before the actual party starts πŸŽ€


✨ SYNOPSIS ✨

here's the whole shape of it, no cap, every field exactly where it lives:

struct iwl_context_info_v2 {
    __le16 version;
    __le16 size;
    __le32 config;
    __le64 prph_info_base_addr;
    __le64 cr_head_idx_arr_base_addr;
    __le64 tr_tail_idx_arr_base_addr;
    __le64 cr_tail_idx_arr_base_addr;
    __le64 tr_head_idx_arr_base_addr;
    __le16 cr_idx_arr_size;
    __le16 tr_idx_arr_size;
    __le64 mtr_base_addr;
    __le64 mcr_base_addr;
    __le16 mtr_size;
    __le16 mcr_size;
    __le16 mtr_doorbell_vec;
    __le16 mcr_doorbell_vec;
    __le16 mtr_msi_vec;
    __le16 mcr_msi_vec;
    u8 mtr_opt_header_size;
    u8 mtr_opt_footer_size;
    u8 mcr_opt_header_size;
    u8 mcr_opt_footer_size;
    __le16 msg_rings_ctrl_flags;
    __le16 prph_info_msi_vec;
    __le64 prph_scratch_base_addr;
    __le32 prph_scratch_size;
    __le32 reserved;
 };

🌸 Members 🌸

okay so this is the part where we meet every single field one by one. yes, all of them. we're doing the whole roster, it's giving group photo πŸ“Έ

  • version β€” the version of the context information. it's the "hi, what generation of me are you meeting" field ✨
  • size β€” the size of the context information, measured in DWs.
  • config β€” the context in which the peripheral would execute. it's a subset of the capability csr register that the peripheral publishes. yes, subset. don't go expecting the whole register, bestie 🫢
  • prph_info_base_addr β€” the start address of the peripheral information structure.
  • cr_head_idx_arr_base_addr β€” the start address of the completion ring head index array.
  • tr_tail_idx_arr_base_addr β€” the start address of the transfer ring tail index array.
  • cr_tail_idx_arr_base_addr β€” the start address of the completion ring tail index array.
  • tr_head_idx_arr_base_addr β€” the start address of the transfer ring head index array. (yes we did head, tail, tail, head β€” that's the order, it ate πŸ’…)
  • cr_idx_arr_size β€” how many entries live in the completion ring index array.
  • tr_idx_arr_size β€” how many entries live in the transfer ring index array.
  • mtr_base_addr β€” the start address of the message transfer ring.
  • mcr_base_addr β€” the start address of the message completion ring.
  • mtr_size β€” the number of entries the message transfer ring can hold.
  • mcr_size β€” the number of entries the message completion ring can hold.
  • mtr_doorbell_vec β€” the doorbell vector associated with the message transfer ring. πŸ””
  • mcr_doorbell_vec β€” the doorbell vector associated with the message completion ring. πŸ””
  • mtr_msi_vec β€” the MSI that shall be generated by the peripheral after completing a transfer descriptor in the message transfer ring.
  • mcr_msi_vec β€” the MSI that shall be generated by the peripheral after completing a completion descriptor in the message completion ring.
  • mtr_opt_header_size β€” the size of the optional header in the transfer descriptor associated with the message transfer ring, in DWs.
  • mtr_opt_footer_size β€” the size of the optional footer in the transfer descriptor associated with the message transfer ring, in DWs.
  • mcr_opt_header_size β€” the size of the optional header in the completion descriptor associated with the message completion ring, in DWs.
  • mcr_opt_footer_size β€” the size of the optional footer in the completion descriptor associated with the message completion ring, in DWs.
  • msg_rings_ctrl_flags β€” the message rings control flags.
  • prph_info_msi_vec β€” the MSI that shall be generated by the peripheral after updating the Peripheral Information structure.
  • prph_scratch_base_addr β€” the start address of the peripheral scratch structure.
  • prph_scratch_size β€” the size of the peripheral scratch structure, in DWs.
  • reserved β€” reserved. that's it. it's a mystery, leave it alone πŸ™ˆ

πŸ”₯ SEE ALSO πŸ”₯

if you wanna go down the rabbit hole (and you do, iykyk), start in the kernel file:

./drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info-v2.h

and then like, the whole extended friend group:

  • enum iwl_prph_scratch_mtr_format(9)
  • enum iwl_prph_scratch_flags(9)
  • enum iwl_prph_scratch_ext_flags(9)
  • struct iwl_prph_scratch_version(9)
  • struct iwl_prph_scratch_control(9)
  • struct iwl_prph_scratch_pnvm_cfg(9)
  • struct iwl_prph_scratch_mem_desc_addr_array(9)
  • struct iwl_prph_scratch_hwm_cfg(9)
  • struct iwl_prph_scratch_rbd_cfg(9)
  • struct iwl_prph_scratch_uefi_cfg(9)
  • struct iwl_prph_scratch_step_cfg(9)
  • struct iwl_prph_scratch_ctrl_cfg(9)
  • struct iwl_context_info_dram_fseq(9)
  • struct iwl_prph_scratch(9)
  • struct iwl_prph_info(9)

ngl this one is a lot of addresses and sizes and honestly? iconic for it. read every field, don't skip, the hardware will absolutely notice 🫢

alright bestie that's the page β€” big kisses from the Kernel API Manual, sourced from ./drivers/net/wireless/intel/i..., dated October 2026, and it'll see you again under the name struct iwl_context_info_v2(9). slay πŸ’–βœ¨

πŸ“¦ where this page comes from