STRUCT IRIS_CORE(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– struct iris_core(9) πŸ’–

okay so first things first: this is a page from the Kernel API Manual, and it's all about the struct that runs the whole show. bestie, this is the main character of the iris driver β€” <pink>struct iris_core</pink> β€” and it holds all the core parameters that are valid for all instances. every single one. no cap. πŸŽ€


✨ SYNOPSIS ✨

struct iris_core {
    struct device                           *dev;
    void __iomem                            *reg_base;
    int irq;
    struct v4l2_device                      v4l2_dev;
    struct video_device                     *vdev_dec;
    struct video_device                     *vdev_enc;
    const struct v4l2_file_operations       *iris_v4l2_file_ops;
    const struct v4l2_ioctl_ops             *iris_v4l2_ioctl_ops_dec;
    const struct v4l2_ioctl_ops             *iris_v4l2_ioctl_ops_enc;
    const struct vb2_ops                    *iris_vb2_ops;
    struct icc_bulk_data                    *icc_tbl;
    u32 icc_count;
    struct dev_pm_domain_list               *pmdomain_tbl;
    struct dev_pm_domain_list               *opp_pmdomain_tbl;
    struct clk_bulk_data                    *clock_tbl;
    u32 clk_count;
    struct reset_control_bulk_data          *resets;
    struct reset_control_bulk_data          *controller_resets;
    const struct iris_platform_data         *iris_platform_data;
    const struct iris_firmware_data         *iris_firmware_data;
    const struct iris_firmware_desc         *iris_firmware_desc;
    const struct qcom_ubwc_cfg_data         *ubwc_cfg;
    enum iris_core_state                    state;
    dma_addr_t iface_q_table_daddr;
    dma_addr_t sfr_daddr;
    void *iface_q_table_vaddr;
    void *sfr_vaddr;
    struct iris_iface_q_info                command_queue;
    struct iris_iface_q_info                message_queue;
    struct iris_iface_q_info                debug_queue;
    struct mutex                            lock;
    u8 *response_packet;
    u32 header_id;
    u32 packet_id;
    struct iris_core_power                  power;
    const struct iris_hfi_sys_ops           *hfi_sys_ops;
    struct completion                       core_init_done;
    u32 intr_status;
    struct delayed_work                     sys_error_handler;
    struct list_head                        instances;
    struct platform_inst_fw_cap             inst_fw_caps_dec[INST_FW_CAP_MAX];
    struct platform_inst_fw_cap             inst_fw_caps_enc[INST_FW_CAP_MAX];
};

look at her. absolutely iconic. πŸ‘‘


🌸 Members 🌸

okay so every field gets its own lil moment, because they all matter. going in order, no skipping, we don't do that here 🫢

  • dev β€” reference to device structure
  • reg_base β€” IO memory base address
  • irq β€” iris irq
  • v4l2_dev β€” a holder for v4l2 device structure
  • vdev_dec β€” iris video device structure for decoder
  • vdev_enc β€” iris video device structure for encoder
  • iris_v4l2_file_ops β€” iris v4l2 file ops
  • iris_v4l2_ioctl_ops_dec β€” iris v4l2 ioctl ops for decoder
  • iris_v4l2_ioctl_ops_enc β€” iris v4l2 ioctl ops for encoder
  • iris_vb2_ops β€” iris vb2 ops
  • icc_tbl β€” table of iris interconnects
  • icc_count β€” count of iris interconnects
  • pmdomain_tbl β€” table of iris power domains
  • opp_pmdomain_tbl β€” table of opp power domains
  • clock_tbl β€” table of iris clocks
  • clk_count β€” count of iris clocks
  • resets β€” table of iris reset clocks
  • controller_resets β€” table of controller reset clocks
  • iris_platform_data β€” a structure for platform data
  • iris_firmware_data β€” a pointer to the firmware (or HFI) specific data
  • iris_firmware_desc β€” a pointer to the firmware-specific descriptive data
  • ubwc_cfg β€” UBWC configuration for the platform
  • state β€” current state of core
  • iface_q_table_daddr β€” device address for interface queue table memory
  • sfr_daddr β€” device address for SFR (Sub System Failure Reason) register memory
  • iface_q_table_vaddr β€” virtual address for interface queue table memory
  • sfr_vaddr β€” virtual address for SFR (Sub System Failure Reason) register memory
  • command_queue β€” shared interface queue to send commands to firmware
  • message_queue β€” shared interface queue to receive responses from firmware
  • debug_queue β€” shared interface queue to receive debug info from firmware
  • lock β€” a lock for this strucure
  • response_packet β€” a pointer to response packet from fw to driver
  • header_id β€” id of packet header
  • packet_id β€” id of packet
  • power β€” a structure for clock and bw information
  • hfi_sys_ops β€” iris HFI system ops
  • core_init_done β€” structure of signal completion for system response
  • intr_status β€” interrupt status
  • sys_error_handler β€” a delayed work for handling system fatal error
  • instances β€” a list_head of all instances
  • inst_fw_caps_dec β€” an array of supported instance capabilities by decoder
  • inst_fw_caps_enc β€” an array of supported instance capabilities by encoder
ngl the way this struct is basically a whole group chat of pointers, counts, queues and one very important <hotpink>lock</hotpink>? it's giving "one shared brain for every instance" and honestly, slay. πŸ’…

πŸ¦‹ SEE ALSO πŸ¦‹

  • Kernel file ./drivers/media/platform/qcom/iris/iris_core.h

and that's the whole page, bestie!! πŸ₯° go read the header file and you'll see her living her truth in the wild. this page is from ./drivers/media/platform/qcom/..., dated October 2026 β€” so like, mark your calendar, periodt. πŸŒˆβ­πŸ’œ

πŸ“¦ where this page comes from