STRUCT IPROC_MSI(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so bestie, welcome to the struct iproc_msi(9) page from the Kernel API Manual ✨ β€” it's literally iProc event queue based MSI, and no cap, that's the whole vibe. πŸ’…


πŸŽ€ SYNOPSIS πŸŽ€

Here's the struct exactly as it is, because we do not mess with code, periodt:

       struct iproc_msi {
           struct iproc_pcie *pcie;
           const u16 (*reg_offsets)[IPROC_MSI_REG_SIZE];
           struct iproc_msi_grp *grps;
           int nr_irqs;
           int nr_cpus;
           bool has_inten_reg;
           unsigned long *bitmap;
           struct mutex bitmap_lock;
           unsigned int nr_msi_vecs;
           struct irq_domain *inner_domain;
           unsigned int nr_eq_region;
           unsigned int nr_msi_region;
           void *eq_cpu;
           dma_addr_t eq_dma;
           phys_addr_t msi_addr;
        };

🧚 Members 🧚

okay bestie, member-by-member, let's get into it:

  • pcie β€” pointer to iProc PCIe data. It's giving "the PCIe info lives here" 🫢.
  • reg_offsets β€” MSI register offsets, fr fr. The type is const u16 (*reg_offsets)[IPROC_MSI_REG_SIZE], so that's the exact shape πŸ’….
  • grps β€” MSI groups. The group chat of MSI groups, lowkey.
  • nr_irqs β€” number of total interrupts connected to GIC. That's the count, no cap.
  • nr_cpus β€” number of toal CPUs β€” yes, "toal", we're keeping the source's spelling and moving on 😭.
  • has_inten_reg β€” indicates the MSI interrupt enable register needs to be set explicitly (required for some legacy platforms). So yes, some legacy platforms need that extra explicit set, bestie 😭.
  • bitmap β€” MSI vector bitmap. The map of vectors, literally.
  • bitmap_lock β€” lock to protect access to the MSI bitmap. Gotta keep it safe, periodt.
  • nr_msi_vecs β€” total number of MSI vectors. The whole vector count, iykyk.
  • inner_domain β€” inner IRQ domain. That's the inner domain, bestie.
  • nr_eq_region β€” required number of 4K aligned memory region for MSI event queues. Yes, "region" singular, we're keeping it πŸŽ€.
  • nr_msi_region β€” required number of 4K aligned address region for MSI posted writes. Posted writes, iconic.
  • eq_cpu β€” pointer to allocated memory region for MSI event queues. It points at the allocated memory region, fr fr.
  • eq_dma β€” DMA address of MSI event queues. That's the DMA address, exactly.
  • msi_addr β€” MSI address. That's the address, periodt.

🌸 Description 🌸

okay so the vibe check here is important: this struct is only meant to be used on platforms without MSI support integrated into the GIC. Like, if your platform has MSI support integrated into the GIC, this is not the main character for you πŸ™ˆ. No extra lore, that's the whole description.


πŸ¦‹ SEE ALSO πŸ¦‹

Kernel file ./drivers/pci/controller/pcie-iproc-msi.c and struct iproc_msi_grp(9) β€” go read those too bestie, iykyk πŸ¦‹βœ¨.


Cute sign-off: source/version is ./drivers/pci/controller, date is October 2026 β€” bye bestie, slay your MSIs πŸ’–πŸŽ€βœ¨

πŸ“¦ where this page comes from