STRUCT IOMMU_HWPT_VTD_S1_INVALIDATE(9)
π struct iommu_hwpt_vtd_s1_invalidate(9) π
okay bestie, welcome to the Kernel API Manual page for struct iommu_hwpt_vtd_s1_invalidate β itβs giving Intel VT-d cache invalidation, and the data type is IOMMU_HWPT_INVALIDATE_DATA_VTD_S1. β¨
β¨ NAME β¨
struct iommu_hwpt_vtd_s1_invalidate β Intel VT-d cache invalidation (IOMMU_HWPT_INVALIDATE_DATA_VTD_S1).
π¦ SYNOPSIS π¦
struct iommu_hwpt_vtd_s1_invalidate {
__aligned_u64 addr;
__aligned_u64 npages;
__u32 flags;
__u32 __reserved;
};
π Members π
addrβ The start address of the range to be invalidated. It needs to be 4KB aligned. πnpagesβ Number of contiguous 4K pages to be invalidated.flagsβ Combination ofenum iommu_hwpt_vtd_s1_invalidate_flags.__reservedβ Must be0. No cap, just zero. π«Ά
πΈ Description πΈ
Okay so this is the Intel VT-d specific invalidation data for user-managed stage-1 cache invalidation in nested translation. Userspace uses this structure to tell the impacted cache scope after modifying the stage-1 page table. π
If you wanna invalidate all the caches related to the page table, set addr to 0 and npages to U64_MAX. Thatβs the whole-scope slay. π₯
The device TLB will be invalidated automatically if ATS is enabled. No extra steps, bestie. π§
π SEE ALSO π
- Kernel file
./include/uapi/linux/iommufd.h General ioctl format(9)struct iommu_destroy(9)struct iommu_ioas_alloc(9)struct iommu_iova_range(9)struct iommu_ioas_iova_ranges(9)struct iommu_ioas_allow_iovas(9)enum iommufd_ioas_map_flags(9)struct iommu_ioas_map(9)struct iommu_ioas_noiommu_get_pa(9)struct iommu_ioas_map_file(9)struct iommu_ioas_copy(9)struct iommu_ioas_unmap(9)enum iommufd_option(9)enum iommufd_option_ops(9)struct iommu_option(9)enum iommufd_vfio_ioas_op(9)struct iommu_vfio_ioas(9)enum iommufd_hwpt_alloc_flags(9)enum iommu_hwpt_vtd_s1_flags(9)struct iommu_hwpt_vtd_s1(9)struct iommu_hwpt_arm_smmuv3(9)struct iommu_hwpt_amd_guest(9)enum iommu_hwpt_data_type(9)struct iommu_hwpt_alloc(9)enum iommu_hw_info_vtd_flags(9)struct iommu_hw_info_vtd(9)enum iommu_hw_info_arm_smmuv3_flags(9)struct iommu_hw_info_arm_smmuv3(9)struct iommu_hw_info_tegra241_cmdqv(9)struct iommu_hw_info_amd(9)enum iommu_hw_info_type(9)enum iommufd_hw_capabilities(9)enum iommufd_hw_info_flags(9)struct iommu_hw_info(9)struct iommu_hwpt_set_dirty_tracking(9)enum iommufd_hwpt_get_dirty_bitmap_flags(9)struct iommu_hwpt_get_dirty_bitmap(9)enum iommu_hwpt_invalidate_data_type(9)enum iommu_hwpt_vtd_s1_invalidate_flags(9)struct iommu_viommu_arm_smmuv3_invalidate(9)struct iommu_hwpt_invalidate(9)enum iommu_hwpt_pgfault_flags(9)enum iommu_hwpt_pgfault_perm(9)struct iommu_hwpt_pgfault(9)enum iommufd_page_response_code(9)struct iommu_hwpt_page_response(9)struct iommu_fault_alloc(9)enum iommu_viommu_type(9)struct iommu_viommu_tegra241_cmdqv(9)struct iommu_viommu_alloc(9)struct iommu_vdevice_alloc(9)struct iommu_ioas_change_process(9)enum iommu_veventq_flag(9)struct iommufd_vevent_header(9)enum iommu_veventq_type(9)struct iommu_vevent_arm_smmuv3(9)struct iommu_vevent_tegra241_cmdqv(9)struct iommu_veventq_alloc(9)enum iommu_hw_queue_type(9)struct iommu_hw_queue_alloc(9)
mwah π this page lives under ./include/uapi/linux, dated October 2026, and the footer spells the name as struct iomm...1_invalidate(9) β periodt. Byeee π«Ά
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms