STRUCT IOMMU_HW_INFO_ARM_SMMUV3(9)
π NAME π
okay bestie, this page is from the Kernel API Manual, and the main character is struct iommu_hw_info_arm_smmuv3 β ARM SMMUv3 hardware information (IOMMU_HW_INFO_TYPE_ARM_SMMUV3). periodt π
β¨ SYNOPSIS β¨
struct iommu_hw_info_arm_smmuv3 {
__u32 flags;
__u32 __reserved;
__u32 idr[6];
__u32 iidr;
__u32 aidr;
};
π«Ά Members π«Ά
flagsβ a combination ofenum iommu_hw_info_arm_smmuv3_flags. slay.__reservedβ must be0. no cap, don't touch it.idrβ implemented features for ARM SMMU Non-secure programming interface.iidrβ information about the implementation and implementer of ARM SMMU, and architecture version supported.aidrβ ARM SMMU architecture version.
π Description π
For the details of idr, iidr and aidr, please refer to the chapters from 6.3.1 to 6.3.6 in the SMMUv3 Spec. π
This reports the raw HW capability, and not all bits are meaningful to be read by userspace. Only the following fields should be used:
idr[0]:ST_LEVEL,TERM_MODEL,STALL_MODEL,TTENDIAN,CD2L,ASID16,TTFidr[1]:SIDSIZE,SSIDSIZEidr[3]:BBML,RILidr[5]:VAX,GRAN64K,GRAN16K,GRAN4K,DS
Okay so, important vibe checks:
S1Pshould be assumed to be true if a NESTED HWPT can be created.- VFIO/iommufd only support platforms with
COHACC, it should be assumed to be true. ATSis a per-device property. If the VMM describes any devices as ATS capable in ACPI/DT it should set the correspondingidr.
This list may expand in future (eg E0PD, AIE, PBHA, D128 etc). It is important that VMMs do not read bits outside the list to allow for compatibility with future kernels. Several features in the SMMUv3 architecture are not currently supported by the kernel for nesting: HTTU, BTM, MPAM and others. π«‘
π SEE ALSO π
okay these are the cross-reference besties, all of them, no skipping:
- Kernel file
./include/uapi/linux/iommufd.h - General ioctl
format(9) struct iommu_destroy(9)struct iommu_ioas_alloc(9)struct iommu_iova_range(9)struct iommu_ioas_iova_ranges(9)struct iommu_ioas_allow_iovas(9)enum iommufd_ioas_map_flags(9)struct iommu_ioas_map(9)struct iommu_ioas_noiommu_get_pa(9)struct iommu_ioas_map_file(9)struct iommu_ioas_copy(9)struct iommu_ioas_unmap(9)enum iommufd_option(9)enum iommufd_option_ops(9)struct iommu_option(9)enum iommufd_vfio_ioas_op(9)struct iommu_vfio_ioas(9)enum iommufd_hwpt_alloc_flags(9)enum iommu_hwpt_vtd_s1_flags(9)struct iommu_hwpt_vtd_s1(9)struct iommu_hwpt_arm_smmuv3(9)struct iommu_hwpt_amd_guest(9)enum iommu_hwpt_data_type(9)struct iommu_hwpt_alloc(9)enum iommu_hw_info_vtd_flags(9)struct iommu_hw_info_vtd(9)enum iommu_hw_info_arm_smmuv3_flags(9)struct iommu_hw_info_tegra241_cmdqv(9)struct iommu_hw_info_amd(9)enum iommu_hw_info_type(9)enum iommufd_hw_capabilities(9)enum iommufd_hw_info_flags(9)struct iommu_hw_info(9)struct iommu_hwpt_set_dirty_tracking(9)enum iommufd_hwpt_get_dirty_bitmap_flags(9)struct iommu_hwpt_get_dirty_bitmap(9)enum iommu_hwpt_invalidate_data_type(9)enum iommu_hwpt_vtd_s1_invalidate_flags(9)struct iommu_hwpt_vtd_s1_invalidate(9)struct iommu_viommu_arm_smmuv3_invalidate(9)struct iommu_hwpt_invalidate(9)enum iommu_hwpt_pgfault_flags(9)enum iommu_hwpt_pgfault_perm(9)struct iommu_hwpt_pgfault(9)enum iommufd_page_response_code(9)struct iommu_hwpt_page_response(9)struct iommu_fault_alloc(9)enum iommu_viommu_type(9)struct iommu_viommu_tegra241_cmdqv(9)struct iommu_viommu_alloc(9)struct iommu_vdevice_alloc(9)struct iommu_ioas_change_process(9)enum iommu_veventq_flag(9)struct iommufd_vevent_header(9)enum iommu_veventq_type(9)struct iommu_vevent_arm_smmuv3(9)struct iommu_vevent_tegra241_cmdqv(9)struct iommu_veventq_alloc(9)enum iommu_hw_queue_type(9)struct iommu_hw_queue_alloc(9)
mwah π β this page is sourced from ./include/uapi/linux, dated October 2026, and filed under struct iomm...o_arm_smmuv3(9). π¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms