STRUCT INTEL_GUC_STATE_CAPTURE(9)
β¨ struct intel_guc_state_capture β Kernel API Manual β¨
okay so bestie, this is the kernel API manual for struct intel_guc_state_capture, and we're gonna get into it π
this one lives in the Kernel API Manual, and honestly it's giving "backstage pass to the GuC error-capture machine" π
πΈ NAME πΈ
struct intel_guc_state_capture β that's the struct, that's the name, no notes π
π¦ SYNOPSIS π¦
struct intel_guc_state_capture {
const struct __guc_mmio_reg_descr_group *reglists;
struct __guc_mmio_reg_descr_group *extlists;
struct __guc_capture_ads_cache ads_cache[GUC_CAPTURE_LIST_INDEX_MAX]
[GUC_CAPTURE_LIST_TYPE_MAX] [GUC_MAX_ENGINE_CLASSES];
void *ads_null_cache;
struct list_head cachelist;
#define PREALLOC_NODES_MAX_COUNT (3 * GUC_MAX_ENGINE_CLASSES *
GUC_MAX_INSTANCES_PER_CLASS);
#define PREALLOC_NODES_DEFAULT_NUMREGS 64;
int max_mmio_per_node;
struct list_head outlist;
};
like, look at her. iconic struct definition, no cap π
π Members π
reglistsβ the static table of register lists that gets used for error-capture state. it just sits there being static and reliable, we love her π«Άextlistsβ the allocated table of steered register lists used for error-capture state. allocated, not static, okay? she's built at runtime, main character energy β¨
NOTE: steered registers have multiple instances depending on the HW configuration (slices or dual-sub-slices) and thus depends on HW fuses discovered at startup π like, the hardware literally tells you at boot how many of these you get, and it's not always the same, so yeah π
ads_cacheβ cached register lists that is ADS format ready π₯ pre-formatted, pre-cached, ready to go, she ateads_null_cacheβ the ADS null cache. that's the whole description bestie, it's a null cache, it's doing null cache things π§cachelistβ the pool of pre-allocated nodes for error capture output π and okay, here's the why, because this part is actually important:
we need this pool of pre-allocated nodes because we cannot dynamically allocate new nodes when receiving the G2H notification β because the event handlers for all G2H event-processing is called by the ct processing worker queue, and when that queue is being processed, there is no absolute guarantee that we are not in the midst of a GT reset operation (which doesn't allow allocations) π so like. no allocations. not allowed. pre-allocated pool it is. periodt.
max_mmio_per_nodeβ max MMIO per node. yes. that's it. that's the function πoutlistβ pool of pre-allocated nodes for error capture output π
a linked list of parsed GuC error-capture output data before reporting with formatting via i915_gpu_coredump. each node in this linked list shall contain a single engine-capture including global, engine-class and engine-instance register dumps as per guc_capture_parsed_output_node β like, one node = one full engine capture, with all three layers of register dump, all cozy in there together π
π Description π
internal context of the intel_guc_capture module. literally just the internal context. that's her job. that's what she does. and she does it well π
π SEE ALSO π
- Kernel file
./drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.hβ go read the header bestie, iykyk πβ¨
so yeah, that's the whole page ππ no extra lore, no hidden options, just struct fields and the very good reasons they exist.
okay and before i go β this one came to you from ./drivers/gpu/drm/i915/gt/uc and it's dated October 2026, so like, mark your calendars or whatever ποΈ love u, bye π«Άπ
πΈ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms