STRUCT INTEL_DPLL_STATE(9)

๐Ÿ“ฆ version 7.3.1, in nixpkgs unstable

๐Ÿ’… struct intel_dpll_state (kernel API manual, bestie edition) ๐Ÿ’…

okay so you're looking at the struct intel_dpll_state page from the Kernel API Manual โ€” yes that one โ€” and honestly? It's a little cutie. It's the struct that holds the DPLL atomic state. Let's get into it ๐Ÿซถ


โœจ NAME โœจ

struct intel_dpll_state โ€” hold the DPLL atomic state. That's the whole job. That's the assignment. She's holding the state. ๐Ÿ’…


๐ŸŒธ SYNOPSIS ๐ŸŒธ

here's literally the whole thing, character for character, no edits (i would never ๐Ÿ˜ญ):

struct intel_dpll_state {
    u8 pipe_mask;
    struct intel_dpll_hw_state hw_state;
 };

two members. that's it. she's compact, she's iconic ๐Ÿ‘‘


๐ŸŽ€ Members ๐ŸŽ€

  • pipe_mask โ€” a u8 mask of the pipes using this DPLL. and bestie, note the wording: active or not. so even the not-currently-active ones are in the mask. no cap, it's all of them ๐Ÿฆ‹
  • hw_state โ€” the hardware configuration for the DPLL, and it's stored in struct intel_dpll_hw_state. that's the type. that's where it lives. iykyk โœจ

๐Ÿ’– Description ๐Ÿ’–

okay so the way that this works: this structure holds an atomic state for the DPLL. and it's flexible like that, because it can represent either of two vibes:

  1. its current state โ€” in which case it's chilling inside struct intel_shared_dpll ๐Ÿ›‹๏ธ
  2. a desired future state โ€” one that would get applied by an atomic mode set, and that one is stored in a struct intel_atomic_state ๐Ÿ”ฎ

same struct, two whole life phases. main character energy fr fr.

also, go see intel_reserve_shared_dplls and intel_release_shared_dplls โ€” those two are her entourage ๐Ÿซถ

ngl these are the functions you'll want to look at if you're wondering who reserves and releases the shared DPLLs. the page sends you there, so i'm sending you there. โœจ

๐Ÿ”ฅ SEE ALSO ๐Ÿ”ฅ

  • Kernel file ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h โ€” that's the header, that's the home base ๐Ÿ 
  • enum intel_dpll_id(9)
  • struct dpll_info(9)
  • struct intel_dpll(9)

go read them, they're all in the same friend group ๐Ÿ’œ


๐ŸŒˆ the sign-off ๐ŸŒˆ

this page lives in ./drivers/gpu/drm/i915/display (the source/version line, bestie) and it's dated October 2026 โ€” yes, the footer said October 2026, so we're being futuristic about it โญ and the manual name is struct intel_dpll_state(9) in case you forgot what page you were on ๐Ÿ’–

anyway that's the whole page, every single detail intact, nothing skipped, nothing invented โ€” slay, go reserve a DPLL responsibly ๐ŸŽ€๐Ÿ’…๐ŸŒŸ

๐Ÿ“ฆ where this page comes from