STRUCT ICE_VERNIER_INFO_E82X(9)

🦋 struct ice_vernier_info_e82x(9) — the Kernel API Manual, but make it make sense 🦋

okay so bestie, welcome to the Kernel API Manual, section 9. today's main character is struct ice_vernier_info_e82x and honestly? she's a little lookup table of numbers and she KNOWS it. 💅

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✨ SYNOPSIS ✨

here's the whole struct, exactly as it lives, no notes:

struct ice_vernier_info_e82x {
    u32 tx_par_clk;
    u32 rx_par_clk;
    u32 tx_pcs_clk;
    u32 rx_pcs_clk;
    u32 tx_desk_rsgb_par;
    u32 rx_desk_rsgb_par;
    u32 tx_desk_rsgb_pcs;
    u32 rx_desk_rsgb_pcs;
    u32 tx_fixed_delay;
    u32 pmd_adj_divisor;
    u32 rx_fixed_delay;
 };

like, she's twelve-ish u32s in a trench coat. iconic behaviour. 🧚

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🌸 Members 🌸

okay let's go field by field, no skips, no cap:

• tx_par_clk — the frequency used to calculate P_REG_PAR_TX_TUS. it's giving "ingredient for a math moment" ✨
• rx_par_clk — the frequency used to calculate P_REG_PAR_RX_TUS. yes, the rx twin, she's here too 🫶
• tx_pcs_clk — the frequency used to calculate P_REG_PCS_TX_TUS 🎀
• rx_pcs_clk — the frequency used to calculate P_REG_PCS_RX_TUS 🎀
• tx_desk_rsgb_par — the frequency used to calculate P_REG_DESK_PAR_TX_TUS 💜
• rx_desk_rsgb_par — the frequency used to calculate P_REG_DESK_PAR_RX_TUS 💜
• tx_desk_rsgb_pcs — the frequency used to calculate P_REG_DESK_PCS_TX_TUS ⭐
• rx_desk_rsgb_pcs — the frequency used to calculate P_REG_DESK_PCS_RX_TUS ⭐
• tx_fixed_delay — the fixed Tx latency, measured in 1/100th nanoseconds. tiny units, huge vibes 🔥
• pmd_adj_divisor — the divisor used to calculate PDM alignment adjustment. she divides, she slays 💅
• rx_fixed_delay — the fixed Rx latency, also measured in 1/100th nanoseconds. matching set, we love a coordinated moment 🎀

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💖 Description 💖

so what IS this thing? it's a table of constants used as part of the Vernier calibration of the Tx and Rx timestamps. literally the cheat sheet for getting your timestamps calibrated correctly. 🕰️✨

that includes:

• the frequency values used to compute TUs per PAR/PCS clock cycle
• the static delay values that were measured during hardware design

⚠️ important caveat bestie, don't skip this one: some values are not used for all link speeds, and the P_REG_DESK_PAR* registers may represent different clock markers at different link speeds — either the deskew marker for multi-lane link speeds, or the Reed Solomon gearbox marker for RS-FEC. so like... same register name, different meaning depending on speed. iykyk 🙈

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👑 SEE ALSO 👑

go touch grass in these files and functions, they're all connected bestie:

• Kernel file ./drivers/net/ethernet/intel/ice/ice_ptp_hw.h
• struct ice_phy_reg_info_eth56g(9)
• struct ice_time_ref_info_e82x(9)
• struct ice_eth56g_mac_reg_cfg(9)
• ice_e82x_time_ref(9)
• ice_set_e82x_time_ref(9)
• ice_get_base_incval(9)

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🎀 cute sign-off 🎀

that's the whole page, fr fr. sourced from ./drivers/net/ethernet/intel/ice, dated October 2026, living under that Kernel API Manual umbrella as struct ice_v...er_info_e82x(9). go calibrate those timestamps, bestie — you're gonna slay 💜🌈🦋