STRUCT HL_INFO_RAZWI_EVENT(9)
π¦ struct hl_info_razwi_event(9) β the Kernel API Manual, but make it make sense π
okay so bestie, this is the page for struct hl_info_razwi_event(9) from the Kernel API Manual, and it's literally the little struct that carries all your razwi info β¨ (yes that's a real thing, stay with me). Let's get into it π«Ά
πΈ NAME πΈ
struct hl_info_razwi_event β razwi information. that's it, that's the whole name. iconic brevity π
β¨ SYNOPSIS β¨
struct hl_info_razwi_event {
__s64 timestamp;
__u64 addr;
__u16 engine_id[HL_RAZWI_MAX_NUM_OF_ENGINES_PER_RTR];
__u16 num_of_possible_engines;
__u8 flags;
__u8 pad[5];
};
look at her. six fields. no notes. π
π MEMBERS π
timestampβ the timestamp of the razwi. when did the chaos happen, bestie β°addrβ the address that, when something accessed it, caused the razwi. like the address was caught in 4K being the problem πengine_idβ the engine id of the razwi initiator π if it was initiated by an engine that doesn't have an engine id, it gets set toHL_RAZWI_NA_ENG_ID. and if there are several possible engines that caused the razwi, this holds all of them β not just one, the whole squad πnum_of_possible_enginesβ the number of possible engine ids, obviously πββοΈ so here's the tea: in some asics, the razwi indication might be common for several engines and there is literally no way to get the exact engine. in that case, theengine_idarray gets filled with all possible engines that caused this razwi. also, there might be a possibility in gaudi where we don't indication on specific engine β in that case the value of this parameter will be zero π«₯flagsβ a bitmask for the additional data, and each bit is its own little moment:HL_RAZWI_READβ razwi caused by a read operation πHL_RAZWI_WRITEβ razwi caused by a write operation βοΈHL_RAZWI_LBWβ razwi caused by an lbw fabric transaction π§΅HL_RAZWI_HBWβ razwi caused by an hbw fabric transaction π§ΆHL_RAZWI_RRβ razwi caused by a range register πHL_RAZWI_ADDR_DECβ razwi caused by an address decode error π
β NOTE β
this data is not supported by all asics, bestie π in that case, the relevant bits will not be set. so if you're looking at something empty, that might be why β no cap, don't come for the struct.
π¦ SEE ALSO π¦
- Kernel file
./include/uapi/drm/habanalabs_accel.h enum hl_goya_dma_direction(9)enum hl_device_status(9)struct hl_info_hw_ip_info(9)struct hl_info_pci_counters(9)struct hl_info_clk_throttle(9)struct hl_info_energy(9)struct hl_open_stats_info(9)struct hl_power_info(9)struct hl_info_sync_manager(9)struct hl_info_cs_counters(9)struct hl_info_last_err_open_dev_time(9)struct hl_info_cs_timeout_event(9)struct hl_info_undefined_opcode_event(9)struct hl_info_hw_err_event(9)struct hl_info_fw_err_event(9)struct hl_info_engine_err_event(9)struct hl_info_dev_memalloc_page_sizes(9)struct hl_page_fault_info(9)struct hl_user_mapping(9)struct hl_info_args(9)
that's a whole friend group right there, go say hi ππ
and that's the page!! mwah, go read your structs responsibly π§ source lives at ./include/uapi/drm, dated October 2026 β bye bestie, ily, drink some water ππΈ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms