STRUCT HL_INFO_HW_IP_INFO(9)

✨ struct hl_info_hw_ip_info(9) ✨

So this is from the Kernel API Manual, and bestie, it's literally the glow-up cheat sheet for your ASIC — it's the struct that hands you the hardware tea on all the different IPs chillin' inside the chip. 👑

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🌸 NAME 🌸

struct hl_info_hw_ip_info — all the hardware info about the various IPs living inside the ASIC 💅

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🦋 SYNOPSIS 🦋

struct hl_info_hw_ip_info {
    __u64 sram_base_address;
    __u64 dram_base_address;
    __u64 dram_size;
    __u32 sram_size;
    __u32 num_of_events;
    __u32 device_id;
    __u32 module_id;
    __u32 decoder_enabled_mask;
    __u16 first_available_interrupt_id;
    __u16 server_type;
    __u32 cpld_version;
    __u32 psoc_pci_pll_nr;
    __u32 psoc_pci_pll_nf;
    __u32 psoc_pci_pll_od;
    __u32 psoc_pci_pll_div_factor;
    __u8 tpc_enabled_mask;
    __u8 dram_enabled;
    __u8 security_enabled;
    __u8 mme_master_slave_mode;
    __u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
    __u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
    __u64 tpc_enabled_mask_ext;
    __u64 dram_page_size;
    __u32 edma_enabled_mask;
    __u16 number_of_user_interrupts;
    __u8 reserved1;
    __u8 reserved2;
    __u64 reserved3;
    __u64 device_mem_alloc_default_page_size;
    __u64 reserved4;
    __u64 reserved5;
    __u32 reserved6;
    __u8 reserved7;
    __u8 revision_id;
    __u16 tpc_interrupt_id;
    __u32 rotator_enabled_mask;
    __u32 reserved9;
    __u64 engine_core_interrupt_reg_addr;
    __u64 reserved_dram_size;
};

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🎀 Members 🎀

Ok so here's the field-by-field tour, no skips, no skimping 🫶

• sram_base_address — the first SRAM physical base address that's free for the user to actually use. Your starting point, your ground zero ✨
• dram_base_address — the first DRAM virtual or physical base address that's free for the user to use. Same energy, DRAM edition.
• dram_size — how much DRAM is available to the user. The size of the bag 💰
• sram_size — how much SRAM is available to the user.
• num_of_events — the number of events that can be received from the f/w. Lowkey important: you need this so you know what size the h/w events array has to be when you pass it to the kernel to fetch the event counters. Don't skip this one, iykyk 😭
• device_id — PCI device ID of the ASIC.
• module_id — Module ID of the ASIC for mezzanine cards in servers (straight from the OCP spec, fancy ✨).
• decoder_enabled_mask — bit-mask showing which decoders are enabled.
• first_available_interrupt_id — the first available interrupt ID for the user, for when you're working with user interrupts. Relevant for Gaudi2 and later 👑
• server_type — the server type the Gaudi ASIC is currently installed in. Value matches enum hl_server_type.
• cpld_version — CPLD version on the board.
• psoc_pci_pll_nr — PCI PLL NR value. The profiler needs it in some ASICs.
• psoc_pci_pll_nf — PCI PLL NF value. The profiler needs it in some ASICs.
• psoc_pci_pll_od — PCI PLL OD value. The profiler needs it in some ASICs.
• psoc_pci_pll_div_factor — PCI PLL DIV factor value. The profiler needs it in some ASICs.
• tpc_enabled_mask — bit-mask showing which TPCs are enabled. Relevant for Goya/Gaudi only.
• dram_enabled — whether the DRAM is enabled.
• security_enabled — whether security is enabled on the device.
• mme_master_slave_mode — tells you whether the MME is running in master/slave configuration. Relevant for Gaudi2 and later 💜
• cpucp_version — the CPUCP f/w version.
• card_name — the card name, as passed by the f/w.
• tpc_enabled_mask_ext — bit-mask showing which TPCs are enabled. Relevant for Gaudi2 and later.
• dram_page_size — the DRAM physical page size.
• edma_enabled_mask — bit-mask showing which EDMAs are enabled. Relevant for Gaudi2 and later.
• number_of_user_interrupts — how many interrupts are available for the userspace application to use. Relevant for Gaudi2 and later.
• device_mem_alloc_default_page_size — the default page size used in device memory allocation.
• revision_id — PCI revision ID of the ASIC.
• tpc_interrupt_id — the interrupt id the TPC uses to raise events toward the host 📣
• rotator_enabled_mask — bit-mask showing which rotators are enabled. Relevant for Gaudi3 and later 🔥
• engine_core_interrupt_reg_addr — interrupt register address for the engine core to use to raise events toward FW.
• reserved_dram_size — DRAM size reserved for the driver and firmware. Hands off, that part's taken 🙈

Also just so we're clear: reserved1, reserved2, reserved3, reserved4, reserved5, reserved6, reserved7 and reserved9 are in the struct too — they're reserved, so there's no description for them. Respect the reserved ✋

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💖 SEE ALSO 💖

• Kernel file ./include/uapi/drm/habanalabs_accel.h enum
• hl_goya_dma_direction(9)
• enum hl_device_status(9)
• struct hl_info_pci_counters(9)
• struct hl_info_clk_throttle(9)
• struct hl_info_energy(9)
• struct hl_open_stats_info(9)
• struct hl_power_info(9)
• struct hl_info_sync_manager(9)
• struct hl_info_cs_counters(9)
• struct hl_info_last_err_open_dev_time(9)
• struct hl_info_cs_timeout_event(9)
• struct hl_info_razwi_event(9)
• struct hl_info_undefined_opcode_event(9)
• struct hl_info_hw_err_event(9)
• struct hl_info_fw_err_event(9)
• struct hl_info_engine_err_event(9)
• struct hl_info_dev_memalloc_page_sizes(9)
• struct hl_page_fault_info(9)
• struct hl_user_mapping(9)
• struct hl_info_args(9)

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That's the whole page, bestie, go read the source and slay 💅✨

Kernel API Manual · source ./include/uapi/drm · October 2026 — mwah, stan this manpage, see u in the next one 💜🎀🦋