STRUCT HL_DEVICE(9)
β¨ NAME β¨
struct hl_device β habanalabs device structure. (Yup bestie, this is the struct hl_device(9) manual page, part 1 of 3, and it is lowkey enormous π)
π¦ SYNOPSIS π¦
okay so here is the whole struct, no cuts, no filters, all vibes preserved:
struct hl_device {
struct pci_dev *pdev;
u64 pcie_bar_phys[HL_PCI_NUM_BARS];
void __iomem *pcie_bar[HL_PCI_NUM_BARS];
void __iomem *rmmio;
struct drm_device drm;
struct cdev cdev_ctrl;
struct device *dev;
struct device *dev_ctrl;
struct delayed_work work_heartbeat;
struct hl_device_reset_work device_reset_work;
struct hl_device_reset_work device_release_watchdog_work;
char asic_name[HL_STR_MAX];
char status[HL_DEV_STS_MAX][HL_STR_MAX];
enum hl_asic_type asic_type;
struct hl_cq *completion_queue;
struct hl_user_interrupt *user_interrupt;
struct hl_user_interrupt tpc_interrupt;
struct hl_user_interrupt unexpected_error_interrupt;
struct hl_user_interrupt common_user_cq_interrupt;
struct hl_user_interrupt common_decoder_interrupt;
struct hl_cs **shadow_cs_queue;
struct workqueue_struct **cq_wq;
struct workqueue_struct *eq_wq;
struct workqueue_struct *cs_cmplt_wq;
struct workqueue_struct *ts_free_obj_wq;
struct workqueue_struct *prefetch_wq;
struct workqueue_struct *reset_wq;
struct hl_ctx *kernel_ctx;
struct hl_hw_queue *kernel_queues;
struct list_head cs_mirror_list;
spinlock_t cs_mirror_lock;
struct hl_mem_mgr kernel_mem_mgr;
struct hl_eq event_queue;
struct dma_pool *dma_pool;
void *cpu_accessible_dma_mem;
dma_addr_t cpu_accessible_dma_address;
struct gen_pool *cpu_accessible_dma_pool;
unsigned long *asid_bitmap;
struct mutex asid_mutex;
struct mutex send_cpu_message_lock;
struct mutex debug_lock;
struct mutex mmu_lock;
struct asic_fixed_properties asic_prop;
const struct hl_asic_funcs *asic_funcs;
void *asic_specific;
struct hl_vm vm;
struct device *hwmon_dev;
struct hwmon_chip_info *hl_chip_info;
struct hl_dbg_device_entry hl_debugfs;
struct hl_debugfs_cfg_access debugfs_cfg_accesses;
struct list_head cb_pool;
spinlock_t cb_pool_lock;
void *internal_cb_pool_virt_addr;
dma_addr_t internal_cb_pool_dma_addr;
struct gen_pool *internal_cb_pool;
u64 internal_cb_va_base;
struct list_head fpriv_list;
struct list_head fpriv_ctrl_list;
struct mutex fpriv_list_lock;
struct mutex fpriv_ctrl_list_lock;
struct hl_cs_counters_atomic aggregated_cs_counters;
struct hl_mmu_priv mmu_priv;
struct hl_mmu_funcs mmu_func[MMU_NUM_PGT_LOCATIONS];
struct hl_dec *dec;
struct fw_load_mgr fw_loader;
struct pci_mem_region pci_mem_region[PCI_REGION_NUMBER];
struct hl_state_dump_specs state_dump_specs;
struct multi_cs_completion multi_cs_completion[
MULTI_CS_MAX_USER_CTX];
struct hl_clk_throttle clk_throttling;
struct hl_error_info captured_err_info;
struct hl_reset_info reset_info;
struct eq_heartbeat_debug_info heartbeat_debug_info;
#ifdef CONFIG_HL_HLDIO;
struct hl_dio hldio;
#endif;
cpumask_t irq_affinity_mask;
u32 *stream_master_qid_arr;
u32 fw_inner_major_ver;
u32 fw_inner_minor_ver;
u32 fw_sw_major_ver;
u32 fw_sw_minor_ver;
u32 fw_sw_sub_minor_ver;
atomic64_t dram_used_mem;
u64 memory_scrub_val;
u64 timeout_jiffies;
u64 max_power;
u64 boot_error_status_mask;
u64 dram_pci_bar_start;
u64 last_successful_open_jif;
u64 last_open_session_duration_jif;
u64 open_counter;
u64 fw_poll_interval_usec;
ktime_t last_successful_open_ktime;
u64 fw_comms_poll_interval_usec;
u64 dram_binning;
u64 tpc_binning;
atomic_t dmabuf_export_cnt;
enum cpucp_card_types card_type;
u32 major;
u32 high_pll;
u32 decoder_binning;
u32 edma_binning;
u32 device_release_watchdog_timeout_sec;
u32 rotator_binning;
u16 id;
u16 cdev_idx;
u16 cpu_pci_msb_addr;
u8 is_in_dram_scrub;
u8 disabled;
u8 cpld_shutdown;
u8 late_init_done;
u8 hwmon_initialized;
u8 reset_on_lockup;
u8 dram_default_page_mapping;
u8 memory_scrub;
u8 pmmu_huge_range;
u8 init_done;
u8 device_cpu_disabled;
u8 in_debug;
u8 cdev_sysfs_debugfs_created;
u8 stop_on_err;
u8 supports_sync_stream;
u8 sync_stream_queue_idx;
u8 collective_mon_idx;
u8 supports_coresight;
u8 supports_cb_mapping;
u8 process_kill_trial_cnt;
u8 device_fini_pending;
u8 supports_staged_submission;
u8 device_cpu_is_halted;
u8 supports_wait_for_multi_cs;
u8 stream_master_qid_arr_size;
u8 is_compute_ctx_active;
u8 compute_ctx_in_release;
u8 supports_mmu_prefetch;
u8 reset_upon_device_release;
u8 supports_ctx_switch;
u8 support_preboot_binning;
u8 eq_heartbeat_received;
u64 nic_ports_mask;
u64 fw_components;
u8 mmu_disable;
u8 cpu_queues_enable;
u8 pldm;
u8 hard_reset_on_fw_events;
u8 bmc_enable;
u8 reset_on_preboot_fail;
u8 heartbeat;
};
π Members π
pdevβ pointer to the PCI device. it can beNULLin case of simulator device, no cap.pcie_bar_phys[HL_PCI_NUM_BARS]β array of available PCIe bars physical addresses. this one is required only for PCI address match mode, iykyk.pcie_bar[HL_PCI_NUM_BARS]β array of available PCIe bars virtual addresses.rmmioβ configuration area address on SRAM.drmβ related DRM device.cdev_ctrlβ char device for control operations only (INFOIOCTL). control-only behavior, periodt.devβ related kernel basic device structure.dev_ctrlβ related kernel device structure for the control device.work_heartbeatβ delayed work for CPU-CP is-alive check.device_reset_workβ delayed work which performs hard reset.device_release_watchdog_workβ watchdog work that performs hard reset if user doesn't release device upon certain error cases. yes, it will actually do it πasic_nameβ ASIC specific name.asic_typeβ ASIC specific type.completion_queueβ array ofhl_cq.user_interruptβ array ofhl_user_interrupt. upon the corresponding user interrupt, driver will monitor the list of fences registered to this interrupt.tpc_interruptβ single TPC interrupt for all TPCs.unexpected_error_interruptβ single interrupt for unexpected user error indication.common_user_cq_interruptβ common user CQ interrupt for all user CQ interrupts. upon any user CQ interrupt, driver will monitor the list of fences registered to this common structure.common_decoder_interruptβ common decoder interrupt for all user decoder interrupts.shadow_cs_queueβ pointer to a shadow queue that holds pointers to outstanding command submissions.cq_wqβ work queues of completion queues for executing work in process context.eq_wqβ work queue of event queue for executing work in process context.cs_cmplt_wqβ work queue of CS completions for executing work in process context.ts_free_obj_wqβ work queue for timestamp registration objects release.prefetch_wqβ work queue for MMU pre-fetch operations.reset_wqβ work queue for device reset procedure.kernel_ctxβ Kernel driver context structure.kernel_queuesβ array ofhl_hw_queue.cs_mirror_listβ CS mirror list for TDR.cs_mirror_lockβ protectscs_mirror_list.kernel_mem_mgrβ memory manager for memory buffers with lifespan of driver.event_queueβ event queue for IRQ from CPU-CP.dma_poolβ DMA pool for small allocations.cpu_accessible_dma_memβHost <-> CPU-CPshared memory CPU address.cpu_accessible_dma_addressβHost <-> CPU-CPshared memory DMA address.cpu_accessible_dma_poolβHost <-> CPU-CPshared memory pool.asid_bitmapβ holds used/available ASIDs.asid_mutexβ protectsasid_bitmap.send_cpu_message_lockβ enforces only one message inHost <-> CPU-CPqueue.debug_lockβ protects critical section of setting debug mode for device.mmu_lockβ protects the MMU page tables and invalidation h/w. Although the page tables are per context, the invalidation h/w is per MMU. Therefore, we can't allow multiple contexts (we only have two, user and kernel) to access the invalidation h/w at the same time. In addition, any change to the PGT, modifying the MMU hash or walking the PGT requires talking this lock. (yes, that wording is doing the most π)asic_propβ ASIC specific immutable properties.asic_funcsβ ASIC specific functions.asic_specificβ ASIC specific information to use only from ASIC files.vmβ virtual memory manager for MMU.hwmon_devβ H/W monitor device.hl_chip_infoβ ASIC's sensors information.hl_debugfsβ device's debugfs manager.debugfs_cfg_accessesβ list of last debugfs config region accesses.cb_poolβ list of pre allocated CBs.cb_pool_lockβ protects the CB pool.internal_cb_pool_virt_addrβ internal command buffer pool virtual address.internal_cb_pool_dma_addrβ internal command buffer pool dma address.internal_cb_poolβ internal command buffer memory pool.internal_cb_va_baseβ internal cb pool mmu virtual address base.fpriv_listβ the list of file private data structures, and each one gets created the moment a user opens the device πfpriv_ctrl_listβ same vibe, different list: file private data structures, each created when a user opens the control devicefpriv_list_lockβ the lock that protectsfpriv_listπfpriv_ctrl_list_lockβ the lock that protectsfpriv_ctrl_listπaggregated_cs_countersβ cs counters, aggregated across all the contexts β¨mmu_privβ device-specific MMU data π§mmu_funcβ the device-related MMU functionsdecβ list of decoder sw instance πfw_loaderβ the FW loader manager, hi bestie πΈpci_mem_regionβ array of memory regions in the PCI π¦state_dump_specsβ the constants and dictionaries you need to dump system statemulti_cs_completionβ array of multi-CS completion πclk_throttlingβ holds info about the current/previous clock throttling eventscaptured_err_infoβ holds info about errors πreset_infoβ holds the current device reset informationheartbeat_debug_infoβ counters used to debug heartbeat failures πhldioβ describes the habanalabs direct storage interaction interfaceirq_affinity_maskβ mask of available CPU cores for user and decoder interrupt handling πstream_master_qid_arrβ pointer to an array with the QIDs of master streamsfw_inner_major_verβ the major of the current loaded preboot inner versionfw_inner_minor_verβ the minor of the current loaded preboot inner versionfw_sw_major_verβ the major of the current loaded preboot SW versionfw_sw_minor_verβ the minor of the current loaded preboot SW versionfw_sw_sub_minor_verβ the sub-minor of the current loaded preboot SW version β¨dram_used_memβ current DRAM memory consumption πmemory_scrub_valβ the value the dram will be scrubbed to using cbscrub_device_dramπ§Όtimeout_jiffiesβ device CS timeout value β³max_powerβ the max power of the device, as configured by the sysadmin. This value is saved so that in case of hard-reset, the driver will restore this value and update the F/W after the re-initialization β‘boot_error_status_maskβ contains a mask of the device boot error status. Each bit represents a different error, according to the defines inhl_boot_if.h. If the bit is cleared, the error will be ignored by the driver during device initialization. Mainly used to debug and workaround firmware bugs πdram_pci_bar_startβ start bus address of the PCIe bar towards DRAMlast_successful_open_jifβ timestamp (jiffies) of the last successful device open πlast_open_session_duration_jifβ duration (jiffies) of the last device open sessionopen_counterβ number of successful device open operations π’fw_poll_interval_usecβ FW status poll interval in usec. used for CPU boot statuslast_successful_open_ktimeβ timestamp (ktime) of the last successful device openfw_comms_poll_interval_usecβ FW comms/protocol poll interval in usec. used for COMMs protocols cmds(COMMS_STS_*) π‘dram_binningβ contains a mask of drams that's received from the f/w, indicating which drams are binned-outtpc_binningβ contains a mask of tpc engines that's received from the f/w, indicating which tpc engines are binned-outdmabuf_export_cntβ number of dma-buf exporting π¦card_typeβ various ASICs have several card types. This indicates the card type of the current device πmajorβ habanalabs kernel driver majorhigh_pllβ high PLL profile frequency πΆdecoder_binningβ contains a mask of decoder engines that's received from the f/w, indicating which decoder engines are binned-outedma_binningβ contains a mask of edma engines that's received from the f/w, indicating which edma engines are binned-outdevice_release_watchdog_timeout_secβ device release watchdog timeout value, in seconds β±οΈrotator_binningβ contains a mask of rotators engines that's received from the f/w, indicating which rotator engines are binned-out (Gaudi3 and above) πidβ device minorcdev_idxβ char device indexcpu_pci_msb_addrβ 50-bit extension bits for the device CPU's 40-bit addresses π’is_in_dram_scrubβ true if a dram scrub operation is on going π§½disabledβ is device disabledcpld_shutdownβ is cpld shutdownlate_init_doneβ is late init stage was done during initialization βhwmon_initializedβ is H/W monitor sensors was initialized π‘οΈreset_on_lockupβ true if a reset should be done in case of a stuck CS, false otherwise πdram_default_page_mappingβ is DRAM default page mapping enabledmemory_scrubβ true to perform device memory scrub in various locations, such as context-switch, context close, page free, etc. π§Όpmmu_huge_rangeβ is a different virtual addresses range used for PMMU with huge pagesinit_doneβ is the initialization of the device done πdevice_cpu_disabledβ is the device CPU disabled (due to timeouts) πin_debugβ whether the device is in a state where the profiling/tracing infrastructure can be used. This indication is needed because in some ASICs we need to do specific operations to enable that infrastructure πcdev_sysfs_debugfs_createdβ were char devices and sysfs/debugfs files createdstop_on_errβ true if engines should stop on error πsupports_sync_streamβ is sync stream supportedsync_stream_queue_idxβ helper index for sync stream queues initializationcollective_mon_idxβ helper index for collective initialization π«Άsupports_coresightβ is CoreSight supportedsupports_cb_mappingβ is mapping a CB to the device's MMU supportedprocess_kill_trial_cntβ number of trials the reset thread tried killing user processes πͺdevice_fini_pendingβ true ifdevice_finiwas called and might be waiting for the reset thread to finishsupports_staged_submissionβ true if staged submissions are supporteddevice_cpu_is_haltedβ flag indicating whether the device CPU was already halted. We can't halt it again, because the COMMS protocol will throw an error. Relevant only for cases where Linux was not loaded to device CPU β οΈsupports_wait_for_multi_csβ true if wait for multi CS is supportedis_compute_ctx_activeβ whether there's an active compute context executing πββοΈcompute_ctx_in_releaseβ true if the current compute context is being releasedsupports_mmu_prefetchβ true if prefetch is supported, otherwise falsereset_upon_device_releaseβ reset the device when the user closes the file descriptor of the device πsupports_ctx_switchβ true if a ctx switch is required upon first submissionsupport_preboot_binningβ true if we support read binning info from prebooteq_heartbeat_receivedβ indication that an eq heartbeat event has been received from FW πnic_ports_maskβ controls which NIC ports are enabled. Used only for testing π§ͺfw_componentsβ controls which f/w components to load to the device. There are multiple f/w stages and sometimes we want to stop at a certain stage. Used only for testing π§ͺmmu_disableβ disable the device MMU(s). Used only for testing π§ͺcpu_queues_enableβ whether to enable queues communication vs. the f/w. Used only for testing π§ͺpldmβ whether we're running in a Palladium environment. Used only for testing π§ͺhard_reset_on_fw_eventsβ whether to do a device hard-reset when a fatal event is received from the f/w. Used only for testing π§ͺbmc_enableβ whether we're running in a box with BMC. Used only for testing π§ͺreset_on_preboot_failβ whether to reset the device if preboot f/w fails to load. Used only for testing π§ͺheartbeatβ controls if we want to enable the heartbeat mechanism vs. the f/w, which verifies that the f/w is always alive. Used only for testing π§ͺ
π SEE ALSO β¨
okay bestie, this is the part where the page goes "here's literally everyone else in the habanalabs cinematic universe" β and it's a lot of them. no gatekeeping, she's @-ing the whole group chat π
first up, the source file everything lives in: Kernel file ./drivers/accel/habanalabs/common/habanalabs.h β that's the mothership, the main character of headers, feel free to go touch grass in there π§
then the whole roster, in the order the page serves it:
enum hl_mmu_page_table_location(9),struct iterate_module_ctx(9),struct hl_gen_wait_properties(9),struct pgt_info(9),enum hl_pci_match_mode(9)enum hl_fw_component(9),enum hl_fw_types(9),enum hl_queue_type(9),struct hw_queue_properties(9),enum vm_type(9)enum mmu_op_flags(9),enum hl_device_hw_state(9),struct hl_mmu_properties(9),struct hl_hints_range(9),struct asic_fixed_properties(9)struct hl_fence(9),struct hl_cs_compl(9),struct hl_ts_buff(9),struct hl_mem_mgr(9),struct hl_mem_mgr_fini_stats(9)struct hl_mmap_mem_buf_behavior(9),struct hl_mmap_mem_buf(9),struct hl_cb(9),struct hl_sync_stream_properties(9),struct hl_encaps_signals_mgr(9)struct hl_hw_queue(9),struct hl_cq(9),struct hl_ts_free_jobs(9),struct hl_user_interrupt(9),struct timestamp_reg_free_node(9)struct hl_user_pending_interrupt(9),struct hl_eq(9),struct hl_dec(9),enum hl_asic_type(9),enum hl_pm_mng_profile(9)enum hl_pll_frequency(9),struct pci_mem_region(9),struct static_fw_load_mgr(9),struct fw_response(9),struct dynamic_fw_load_mgr(9)struct pre_fw_load_props(9),struct fw_image_props(9),struct fw_load_mgr(9),struct engines_data(9),struct hl_asic_funcs(9)enum hl_va_range_type(9),struct hl_va_range(9),struct hl_cs_counters_atomic(9),struct hl_dmabuf_priv(9),struct hl_cs_outcome(9)struct hl_cs_outcome_store(9),struct hl_ctx(9),struct hl_ctx_mgr(9),struct hl_userptr(9),struct hl_cs(9)struct hl_cs_job(9),struct hl_cs_parser(9),struct hl_vm_hash_node(9),struct hl_vm_hw_block_list_node(9),struct hl_vm_phys_pg_pack(9)struct hl_vm_va_block(9),struct hl_vm(9),struct hl_debug_params(9),struct hl_notifier_event(9),struct hl_fpriv(9)struct hl_info_list(9),struct hl_debugfs_entry(9),struct hl_dbg_device_entry(9),struct hl_debugfs_cfg_access_entry(9),struct hl_debugfs_cfg_access(9)struct hl_hw_obj_name_entry(9),struct hl_mon_state_dump(9),struct hl_sync_to_engine_map_entry(9),struct hl_sync_to_engine_map(9),struct hl_state_dump_specs_funcs(9)struct hl_state_dump_specs(9),struct hl_device_reset_work(9),struct hl_mmu_priv(9),struct hl_mmu_per_hop_info(9),struct hl_mmu_hop_info(9)struct hl_hr_mmu_funcs(9),struct hl_mmu_funcs(9),struct hl_prefetch_work(9),struct multi_cs_completion(9),struct multi_cs_data(9)struct hl_clk_throttle_timestamp(9),struct hl_clk_throttle(9),struct user_mapped_block(9),struct cs_timeout_info(9),struct undefined_opcode_info(9)struct page_fault_info(9),struct razwi_info(9),struct hw_err_info(9),struct fw_err_info(9),struct engine_err_info(9)struct hl_error_info(9),struct hl_reset_info(9),struct eq_heartbeat_debug_info(9),struct hl_cs_encaps_sig_handle(9),struct hl_info_fw_err_info(9)hl_ioctl_t(9),struct hl_ioctl_desc(9),hl_get_sg_info(9),hl_mem_area_inside_range(9),hl_mem_area_crosses_range(9)
likeβ¦ that's the whole friend group π every struct, every enum, every one of them has their own page and they all link back here. iykyk π«Ά
lowkey a tip from your girl: if you're just vibing in here looking for one specific struct, man 9 that name directly instead of scrolling this wall of text. it's giving efficiency π
and that's the page, bestie!! π you made it to the end, obsessed with your dedication fr fr. this whole thing ships out of ./drivers/accel/habanalabs/common (that's the source directory, and also the source line at the bottom of the page), dated October 2026, and it's filed under struct hl_device(9) β that's the version/title line of the page β¨ go forth and slay your kernel driver debugging, you absolute icon ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms