STRUCT HL_ASIC_FUNCS(9)

✨ NAME ✨

okay so bestie, this is the manual page for struct hl_asic_funcs(9) — the Kernel API Manual entry for this struct. It’s giving ASIC specific functions that can be called from common code, and the synopsis below is the whole group-chat roster of function pointers. 💅🫶

struct hl_asic_funcs — ASIC specific functions that can be called from common code. 🛠️✨

🦋 SYNOPSIS 🦋

okay so here’s the full struct, every field exactly as it appears, no cap:

       struct hl_asic_funcs {
           int (*early_init)(struct hl_device *hdev);
           int (*early_fini)(struct hl_device *hdev);
           int (*late_init)(struct hl_device *hdev);
           void (*late_fini)(struct hl_device *hdev);
           int (*sw_init)(struct hl_device *hdev);
           int (*sw_fini)(struct hl_device *hdev);
           int (*hw_init)(struct hl_device *hdev);
           int (*hw_fini)(struct hl_device *hdev, bool hard_reset, bool
       fw_reset);
           void (*halt_engines)(struct hl_device *hdev, bool hard_reset, bool
       fw_reset);
           int (*suspend)(struct hl_device *hdev);
           int (*resume)(struct hl_device *hdev);
           int (*mmap)(struct hl_device *hdev, struct vm_area_struct *vma, void
       *cpu_addr, dma_addr_t dma_addr, size_t size);
           void (*ring_doorbell)(struct hl_device *hdev, u32 hw_queue_id, u32
       pi);
           void (*pqe_write)(struct hl_device *hdev, __le64 *pqe, struct hl_bd
       *bd);
           void* (*asic_dma_alloc_coherent)(struct hl_device *hdev, size_t
       size, dma_addr_t *dma_handle, gfp_t flag);
           void (*asic_dma_free_coherent)(struct hl_device *hdev, size_t size,
       void *cpu_addr, dma_addr_t dma_handle);
           int (*scrub_device_mem)(struct hl_device *hdev);
           int (*scrub_device_dram)(struct hl_device *hdev, u64 val);
           void* (*get_int_queue_base)(struct hl_device *hdev, u32 queue_id,
       dma_addr_t *dma_handle, u16 *queue_len);
           int (*test_queues)(struct hl_device *hdev);
           void* (*asic_dma_pool_zalloc)(struct hl_device *hdev, size_t size,
       gfp_t mem_flags, dma_addr_t *dma_handle);
           void (*asic_dma_pool_free)(struct hl_device *hdev, void *vaddr,
       dma_addr_t dma_addr);
           void* (*cpu_accessible_dma_pool_alloc)(struct hl_device *hdev,
       size_t size, dma_addr_t *dma_handle);
           void (*cpu_accessible_dma_pool_free)(struct hl_device *hdev, size_t
       size, void *vaddr);
           void (*dma_unmap_sgtable)(struct hl_device *hdev, struct sg_table
       *sgt, enum dma_data_direction dir);
           int (*dma_map_sgtable)(struct hl_device *hdev, struct sg_table *sgt,
       enum dma_data_direction dir);
           int (*cs_parser)(struct hl_device *hdev, struct hl_cs_parser
       *parser);
           void (*add_end_of_cb_packets)(struct hl_device *hdev, void
       *kernel_address, u32 len, u32 original_len, u64 cq_addr, u32 cq_val, u32
       msix_num, bool eb);
           void (*update_eq_ci)(struct hl_device *hdev, u32 val);
           int (*context_switch)(struct hl_device *hdev, u32 asid);
           void (*restore_phase_topology)(struct hl_device *hdev);
           int (*debugfs_read_dma)(struct hl_device *hdev, u64 addr, u32 size,
       void *blob_addr);
           void (*add_device_attr)(struct hl_device *hdev, struct
       attribute_group *dev_clk_attr_grp, struct attribute_group
       *dev_vrm_attr_grp);
           void (*handle_eqe)(struct hl_device *hdev, struct hl_eq_entry
       *eq_entry);
           void* (*get_events_stat)(struct hl_device *hdev, bool aggregate, u32
       *size);
           u64 (*read_pte)(struct hl_device *hdev, u64 addr);
           void (*write_pte)(struct hl_device *hdev, u64 addr, u64 val);
           int (*mmu_invalidate_cache)(struct hl_device *hdev, bool is_hard,
       u32 flags);
           int (*mmu_invalidate_cache_range)(struct hl_device *hdev, bool
       is_hard, u32 flags, u32 asid, u64 va, u64 size);
           int (*mmu_prefetch_cache_range)(struct hl_ctx *ctx, u32 flags, u32
       asid, u64 va, u64 size);
           int (*send_heartbeat)(struct hl_device *hdev);
           int (*debug_coresight)(struct hl_device *hdev, struct hl_ctx *ctx,
       void *data);
           bool (*is_device_idle)(struct hl_device *hdev, u64 *mask_arr, u8
       mask_len, struct engines_data *e);
           int (*compute_reset_late_init)(struct hl_device *hdev);
           void (*hw_queues_lock)(struct hl_device *hdev);
           void (*hw_queues_unlock)(struct hl_device *hdev);
           u32 (*get_pci_id)(struct hl_device *hdev);
           int (*get_eeprom_data)(struct hl_device *hdev, void *data, size_t
       max_size);
           int (*get_monitor_dump)(struct hl_device *hdev, void *data);
           int (*send_cpu_message)(struct hl_device *hdev, u32 *msg, u16 len,
       u32 timeout, u64 *result);
           int (*pci_bars_map)(struct hl_device *hdev);
           int (*init_iatu)(struct hl_device *hdev);
           u32 (*rreg)(struct hl_device *hdev, u32 reg);
           void (*wreg)(struct hl_device *hdev, u32 reg, u32 val);
           void (*halt_coresight)(struct hl_device *hdev, struct hl_ctx *ctx);
           int (*ctx_init)(struct hl_ctx *ctx);
           void (*ctx_fini)(struct hl_ctx *ctx);
           int (*pre_schedule_cs)(struct hl_cs *cs);
           u32 (*get_queue_id_for_cq)(struct hl_device *hdev, u32 cq_idx);
           int (*load_firmware_to_device)(struct hl_device *hdev);
           int (*load_boot_fit_to_device)(struct hl_device *hdev);
           u32 (*get_signal_cb_size)(struct hl_device *hdev);
           u32 (*get_wait_cb_size)(struct hl_device *hdev);
           u32 (*gen_signal_cb)(struct hl_device *hdev, void *data, u16 sob_id,
       u32 size, bool eb);
           u32 (*gen_wait_cb)(struct hl_device *hdev, struct
       hl_gen_wait_properties *prop);
           void (*reset_sob)(struct hl_device *hdev, void *data);
           void (*reset_sob_group)(struct hl_device *hdev, u16 sob_group);
           u64 (*get_device_time)(struct hl_device *hdev);
           void (*pb_print_security_errors)(struct hl_device *hdev, u32
       block_addr, u32 cause, u32 offended_addr);
           int (*collective_wait_init_cs)(struct hl_cs *cs);
           int (*collective_wait_create_jobs)(struct hl_device *hdev, struct
       hl_ctx *ctx, struct hl_cs *cs, u32 wait_queue_id, u32
       collective_engine_id, u32 encaps_signal_offset);
           u32 (*get_dec_base_addr)(struct hl_device *hdev, u32 core_id);
           u64 (*scramble_addr)(struct hl_device *hdev, u64 addr);
           u64 (*descramble_addr)(struct hl_device *hdev, u64 addr);
           void (*ack_protection_bits_errors)(struct hl_device *hdev);
           int (*get_hw_block_id)(struct hl_device *hdev, u64 block_addr, u32
       *block_size, u32 *block_id);
           int (*hw_block_mmap)(struct hl_device *hdev, struct vm_area_struct
       *vma, u32 block_id, u32 block_size);
           void (*enable_events_from_fw)(struct hl_device *hdev);
           int (*ack_mmu_errors)(struct hl_device *hdev, u64 mmu_cap_mask);
           void (*get_msi_info)(__le32 *table);
           int (*map_pll_idx_to_fw_idx)(u32 pll_idx);
           void (*init_firmware_preload_params)(struct hl_device *hdev);
           void (*init_firmware_loader)(struct hl_device *hdev);
           void (*init_cpu_scrambler_dram)(struct hl_device *hdev);
           void (*state_dump_init)(struct hl_device *hdev);
           u32 (*get_sob_addr)(struct hl_device *hdev, u32 sob_id);
           void (*set_pci_memory_regions)(struct hl_device *hdev);
           u32* (*get_stream_master_qid_arr)(void);
           void (*check_if_razwi_happened)(struct hl_device *hdev);
           int (*mmu_get_real_page_size)(struct hl_device *hdev, struct
       hl_mmu_properties *mmu_prop, u32 page_size, u32 *real_page_size, bool
       is_dram_addr);
           int (*access_dev_mem)(struct hl_device *hdev, enum pci_region
       region_type, u64 addr, u64 *val, enum debugfs_access_type acc_type);
           u64 (*set_dram_bar_base)(struct hl_device *hdev, u64 addr);
           int (*set_engine_cores)(struct hl_device *hdev, u32 *core_ids, u32
       num_cores, u32 core_command);
           int (*set_engines)(struct hl_device *hdev, u32 *engine_ids, u32
       num_engines, u32 engine_command);
           int (*send_device_activity)(struct hl_device *hdev, bool open);
           int (*set_dram_properties)(struct hl_device *hdev);
           int (*set_binning_masks)(struct hl_device *hdev);
        };

🌸 Members 🌸

okay bestie, here’s the full member lineup for struct hl_asic_funcs — every function pointer, every optional bit, every “this matters” caveat, no skips, periodt 💅

• early_init — sets up the early driver state (pre sw_init), and does not configure H/W.
• early_fini — tears down whatever early_init did.
• late_init — sets up the late driver/hw state (post hw_init) — Optional.
• late_fini — tears down whatever late_init did (pre hw_fini) — Optional.
• sw_init — sets up driver state, does not configure H/W.
• sw_fini — tears down driver state, does not configure H/W.
• hw_init — sets up the H/W state ✨
• hw_fini — tears down the H/W state.
• halt_engines — halts engines, needed for the reset sequence. This also disables interrupts from the device. Call it before hw_fini and before CS rollback.
• suspend — handles IP-specific H/W or SW changes for suspend.
• resume — handles IP-specific H/W or SW changes for resume.
• mmap — maps a memory.
• ring_doorbell — increments PI on a given QMAN.
• pqe_write — writes the PQ entry to the PQ. This is an ASIC-specific function because the PQs live in different memory areas per ASIC (SRAM, DRAM, Host memory), so the method of writing the PQE has to match the destination memory area’s properties.
• asic_dma_alloc_coherent — allocates coherent DMA memory by calling dma_alloc_coherent. This is an ASIC function because its implementation is not trivial when the driver is loaded in simulation mode (not upstreamed).
• asic_dma_free_coherent — frees coherent DMA memory by calling dma_free_coherent. This is an ASIC function because its implementation is not trivial when the driver is loaded in simulation mode (not upstreamed).
• scrub_device_mem — scrubs the entire SRAM and DRAM 🧼
• scrub_device_dram — scrubs the dram memory of the device.
• get_int_queue_base — gets the internal queue base address.
• test_queues — runs a simple test on all queues for a sanity check.
• asic_dma_pool_zalloc — small DMA allocation of coherent memory from the DMA pool. The size of the allocation is HL_DMA_POOL_BLK_SIZE.
• asic_dma_pool_free — frees a small DMA allocation from the pool.
• cpu_accessible_dma_pool_alloc — allocates a CPU PQ packet from the DMA pool.
• cpu_accessible_dma_pool_free — frees a CPU PQ packet from the DMA pool.
• dma_unmap_sgtable — DMA unmaps a scatter-gather table.
• dma_map_sgtable — DMA maps a scatter-gather table.
• cs_parser — parses Command Submission.
• add_end_of_cb_packets — adds packets to the end of CB, if the device requires it.
• update_eq_ci — updates event queue CI.
• context_switch — called upon ASID context switch.
• restore_phase_topology — clears all SOBs and MONs.
• debugfs_read_dma — debug interface for reading up to 2MB from the device’s internal memory via the DMA engine.
• add_device_attr — adds ASIC-specific device attributes.
• handle_eqe — handles an event queue entry (IRQ) from CPU-CP.
• get_events_stat — retrieves the event queue entries histogram.
• read_pte — reads an MMU page table entry from DRAM.
• write_pte — writes an MMU page table entry to DRAM.
• mmu_invalidate_cache — flushes the MMU STLB host/DRAM cache, either with a soft (L1 only) or hard (L0 & L1) flush.
• mmu_invalidate_cache_range — flushes specific MMU STLB cache lines with an ASID-VA-size mask.
• mmu_prefetch_cache_range — pre-fetches specific MMU STLB cache lines with an ASID-VA-size mask.
• send_heartbeat — sends an is-alive packet to CPU-CP and verifies the response 💓
• debug_coresight — performs certain actions on Coresight for debugging.
• is_device_idle — returns true if the device is idle, false otherwise.
• compute_reset_late_init — performs certain actions needed after a compute reset.
• hw_queues_lock — acquires the H/W queues lock.
• hw_queues_unlock — releases the H/W queues lock.
• get_pci_id — retrieves the PCI ID.
• get_eeprom_data — retrieves EEPROM data from F/W.
• get_monitor_dump — retrieves a monitor registers dump from F/W.
• send_cpu_message — sends a message to F/W. If the message is timedout, the driver will eventually reset the device. The timeout can be determined by the calling function, or it can be 0 and then the timeout is the default timeout for the specific ASIC.
• pci_bars_map — maps PCI BARs.
• init_iatu — initializes the iATU unit inside the PCI controller.
• rreg — reads a register. Needed for simulator support.
• wreg — writes a register. Needed for simulator support.
• halt_coresight — stops the ETF and ETR traces.
• ctx_init — context-dependent initialization.
• ctx_fini — context-dependent cleanup.
• pre_schedule_cs — performs pre-CS-scheduling operations.
• get_queue_id_for_cq — gets the H/W queue id related to the given CQ index.
• load_firmware_to_device — loads the firmware to the device’s memory.
• load_boot_fit_to_device — loads boot fit to the device’s memory.
• get_signal_cb_size — gets the signal CB size.
• get_wait_cb_size — gets the wait CB size.
• gen_signal_cb — generates a signal CB.
• gen_wait_cb — generates a wait CB.
• reset_sob — resets a SOB.
• reset_sob_group — resets the SOB group.
• get_device_time — gets the device time ⏰
• pb_print_security_errors — prints security errors according block and cause.
• collective_wait_init_cs — generates collective master/slave packets and places them in the relevant cs jobs.
• collective_wait_create_jobs — allocates collective wait cs jobs.
• get_dec_base_addr — gets the base address of a given decoder.
• scramble_addr — routine to scramble the address prior of mapping it in the MMU.
• descramble_addr — routine to de-scramble the address prior of showing it to users.
• ack_protection_bits_errors — acks and dumps all security violations 🚨
• get_hw_block_id — retrieves a HW block id to be used by the user to mmap it. Also returns the size of the block if the caller supplies a valid pointer for it.
• hw_block_mmap — mmaps a HW block with a given id.
• enable_events_from_fw — sends an interrupt to firmware to notify them the driver is ready to receive asynchronous events. This function should be called during the first init and after every hard-reset of the device.
• ack_mmu_errors — checks and acks mmu errors, page fault, access violation.
• get_msi_info — retrieves the asic-specific MSI ID of the f/w async event.
• map_pll_idx_to_fw_idx — converts a driver-specific per-ASIC PLL index to generic f/w-compatible PLL Indexes.
• init_firmware_preload_params — initializes pre-FW-load parameters.
• init_firmware_loader — initializes data for the FW loader.
• init_cpu_scrambler_dram — enables CPU-specific DRAM scrambling.
• state_dump_init — initializes constants required for state dump.
• get_sob_addr — gets the SOB base address offset.
• set_pci_memory_regions — setting properties of PCI memory regions.
• get_stream_master_qid_arr — gets a pointer to the stream masters QID array.
• check_if_razwi_happened — checks if there was a razwi due to an RR violation.
• access_dev_mem — accesses device memory.
• set_dram_bar_base — sets the base of the DRAM BAR.
• set_engine_cores — sets a config command to engine cores.
• set_engines — sets a config command to user engines.
• send_device_activity — indication to FW about device availability.
• set_dram_properties — sets DRAM-related properties.
• set_binning_masks — sets binning/enable masks for all relevant components.

🌈 SEE ALSO 🌈

ok so bestie, you're not done yet 💅 — this struct is like the popular girl at school, everybody knows her and she knows everybody. Here's the whole contact list, no cap, every single one:

• Kernel file ./drivers/accel/habanalabs/common/habanalabs.h — the source file itself, the mothership, the main character 🎀
• enum hl_mmu_page_table_location(9) — where the page tables live
• struct iterate_module_ctx(9) — the lil context for walking modules
• struct hl_gen_wait_properties(9) — generic wait props, iconic
• struct pgt_info(9) — page table info, keeping it organized
• enum hl_pci_match_mode(9) — how we match PCI devices
• enum hl_fw_component(9) — firmware components, plural, slay
• enum hl_fw_types(9) — the flavors of firmware
• enum hl_queue_type(9) — what kind of queue are we talking about
• struct hw_queue_properties(9) — properties of the hardware queue
• enum vm_type(9) — virtual memory types
• enum mmu_op_flags(9) — MMU operation flags
• enum hl_device_hw_state(9) — the device's hardware state of mind
• struct hl_mmu_properties(9) — MMU properties, obsessed
• struct hl_hints_range(9) — hint ranges, spicy
• struct asic_fixed_properties(9) — the fixed-in-stone ASIC properties
• struct hl_fence(9) — fences, for synchronization bestie 🦋
• struct hl_cs_compl(9) — command submission completions
• struct hl_ts_buff(9) — timestamp buffer
• struct hl_mem_mgr(9) — memory manager, the responsible one
• struct hl_mem_mgr_fini_stats(9) — stats from finishing up the mem manager
• struct hl_mmap_mem_buf_behavior(9) — how mmap memory buffers act
• struct hl_mmap_mem_buf(9) — the mmap memory buffer itself
• struct hl_cb(9) — command buffer, classic
• struct hl_sync_stream_properties(9) — sync stream props
• struct hl_encaps_signals_mgr(9) — encapsulated signals manager, fancy
• struct hl_hw_queue(9) — hardware queue, the real one
• struct hl_cq(9) — completion queue 💖
• struct hl_ts_free_jobs(9) — timestamp free jobs
• struct hl_user_interrupt(9) — user interrupts incoming 🫶
• struct timestamp_reg_free_node(9) — node for freeing timestamp regs
• struct hl_user_pending_interrupt(9) — interrupts still pending, the suspense
• struct hl_eq(9) — event queue ✨
• struct hl_dec(9) — the decoder
• enum hl_asic_type(9) — which ASIC are we even on
• enum hl_pm_mng_profile(9) — power management profile
• enum hl_pll_frequency(9) — PLL frequency values
• struct pci_mem_region(9) — a PCI memory region
• struct static_fw_load_mgr(9) — static firmware load manager
• struct fw_response(9) — firmware said something back
• struct dynamic_fw_load_mgr(9) — dynamic firmware load manager, flexible queen
• struct pre_fw_load_props(9) — props from before the fw load
• struct fw_image_props(9) — firmware image properties
• struct fw_load_mgr(9) — the load manager itself
• struct engines_data(9) — data about the engines 🔥
• enum hl_va_range_type(9) — virtual address range types
• struct hl_va_range(9) — the VA range
• struct hl_cs_counters_atomic(9) — atomic CS counters, very atomic
• struct hl_dmabuf_priv(9) — private dmabuf data
• struct hl_cs_outcome(9) — how the CS turned out
• struct hl_cs_outcome_store(9) — where outcomes get stored
• struct hl_ctx(9) — context, as in the context of everything
• struct hl_ctx_mgr(9) — context manager
• struct hl_userptr(9) — user pointer, pointed
• struct hl_cs(9) — command submission 💅
• struct hl_cs_job(9) — a job inside that submission
• struct hl_cs_parser(9) — parses CS's
• struct hl_vm_hash_node(9) — hash node in the VM
• struct hl_vm_hw_block_list_node(9) — hw block list node
• struct hl_vm_phys_pg_pack(9) — physical page pack
• struct hl_vm_va_block(9) — virtual address block
• struct hl_vm(9) — virtual memory, the whole vibe
• struct hl_debug_params(9) — debug params 🌸
• struct hl_notifier_event(9) — notifier event, pay attention
• struct hl_fpriv(9) — file private data
• struct hl_info_list(9) — info list
• struct hl_debugfs_entry(9) — debugfs entry
• struct hl_dbg_device_entry(9) — device debug entry
• struct hl_debugfs_cfg_access_entry(9) — cfg access entry for debugfs
• struct hl_debugfs_cfg_access(9) — cfg access, yes again
• struct hl_hw_obj_name_entry(9) — hardware object name entry
• struct hl_mon_state_dump(9) — monitor state dump
• struct hl_sync_to_engine_map_entry(9) — sync-to-engine map entry
• struct hl_sync_to_engine_map(9) — the map itself
• struct hl_state_dump_specs_funcs(9) — funcs for state dump specs
• struct hl_state_dump_specs(9) — state dump specs
• struct hl_device_reset_work(9) — reset work, chaos but organized
• struct hl_mmu_priv(9) — MMU private stuff
• struct hl_mmu_per_hop_info(9) — per-hop MMU info
• struct hl_mmu_hop_info(9) — hop info, hop hop hop 🐇
• struct hl_hr_mmu_funcs(9) — host-resident MMU funcs
• struct hl_mmu_funcs(9) — MMU funcs general
• struct hl_prefetch_work(9) — prefetch work
• struct multi_cs_completion(9) — completion for multiple CS's
• struct multi_cs_data(9) — data for multiple CS's
• struct hl_clk_throttle_timestamp(9) — clock throttle timestamp
• struct hl_clk_throttle(9) — clock throttling, sad but real
• struct user_mapped_block(9) — a user-mapped block
• struct cs_timeout_info(9) — CS timeout info, the drama 💀
• struct undefined_opcode_info(9) — undefined opcode info, oops
• struct page_fault_info(9) — page fault info
• struct razwi_info(9) — RAZWI info
• struct hw_err_info(9) — hardware error info
• struct fw_err_info(9) — firmware error info
• struct engine_err_info(9) — engine error info
• struct hl_error_info(9) — all the error info ever
• struct hl_reset_info(9) — reset info, we've been through things
• struct eq_heartbeat_debug_info(9) — event queue heartbeat debug info 🫀
• struct hl_device(9) — the device, the whole shebang 👑
• struct hl_cs_encaps_sig_handle(9) — encaps signals handle for CS
• struct hl_info_fw_err_info(9) — fw error info for the info ioctl
• hl_ioctl_t(9) — the ioctl type
• struct hl_ioctl_desc(9) — ioctl descriptor
• hl_get_sg_info(9) — get the scatter-gather info
• hl_mem_area_inside_range(9) — is the memory area inside the range
• hl_mem_area_crosses_range(9) — does it cross the range

ok that's literally the entire roster, bestie, you made it 🎉 go take a walk, drink some water, you've earned it 🌈🦋

this whole page comes from ./drivers/accel/habanalabs/common, dated October 2026, all about struct hl_asic_funcs(9) — and yes she ate every time 💅✨