STRUCT HI6220_CLK_DIVIDER(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

struct hi6220_clk_divider β€” divider clock for hi6220

okay bestie, welcome to the Kernel API Manual page for struct hi6220_clk_divider(9) πŸ’… this is the divider clock situation for hi6220, and we're gonna go through every single member like it's a group chat roll call 🫢


πŸ¦‹ SYNOPSIS πŸ¦‹

the struct is literally this, no edits, periodt:

struct hi6220_clk_divider {
    struct clk_hw   hw;
    void __iomem    *reg;
    u8 shift;
    u8 width;
    u32 mask;
    spinlock_t *lock;
    struct clk_div_table table[];
};

πŸŽ€ Members πŸŽ€

  • hw β€” the handle between common and hardware-specific interfaces ✨
  • reg β€” the register containing divider 🌸
  • shift β€” shift to the divider bit field πŸ’–
  • width β€” width of the divider bit field πŸ¦‹
  • mask β€” mask for setting divider rate πŸ‘‘
  • lock β€” register lock πŸ”’
  • table β€” the div table that the divider supports πŸŽ€
not me listing every field like they're VIPs at the function, but that's genuinely all of them πŸ’€ no skips, no cap.

🌈 SEE ALSO 🌈

  • Kernel file ./drivers/clk/hisilicon/clkdivider-hi6220.c ⭐

mwah πŸ’‹ that's the whole page β€” source/version: ./drivers/clk/hisilicon, dated October 2026 πŸ§šβ€β™€οΈβœ¨

πŸ“¦ where this page comes from