STRUCT GPIO_REGMAP_CONFIG(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct gpio_regmap_config(9) ✨

Okay so bestie, grab your emotional support iced coffee because we're diving into struct gpio_regmap_config β€” the Description of a generic regmap gpio_chip. This is from the Kernel API Manual and it's lowkey iconic. πŸ’…


🌸 SYNOPSIS 🌸

struct gpio_regmap_config {
    struct device *parent;
    struct regmap *regmap;
    struct fwnode_handle *fwnode;
    const char *label;
    int ngpio;
    const char *const *names;
    unsigned int reg_dat_base;
    unsigned int reg_set_base;
    unsigned int reg_clr_base;
    unsigned int reg_dir_in_base;
    unsigned int reg_dir_out_base;
    int reg_stride;
    int ngpio_per_reg;
    struct irq_domain *irq_domain;
    unsigned long *fixed_direction_mask;
    unsigned long *fixed_direction_output;
  #ifdef CONFIG_REGMAP_IRQ;
    struct regmap_irq_chip *regmap_irq_chip;
    int regmap_irq_line;
    unsigned long regmap_irq_flags;
  #endif;
    int (*reg_mask_xlate)(struct gpio_regmap *gpio, enum
gpio_regmap_operation, unsigned int base, unsigned int offset, unsigned
int *reg, unsigned int *mask);
    int (*init_valid_mask)(struct gpio_chip *gc, unsigned long
*valid_mask, unsigned int ngpios);
    int (*value_xlate)(struct gpio_regmap *gpio, enum
gpio_regmap_operation, unsigned int base, unsigned int offset, unsigned
int reg, unsigned int *mask, unsigned int *val);
    int (*set_config)(struct gpio_regmap *gpio, struct gpio_chip *chip,
unsigned int offset, unsigned long config);
    void *drvdata;
 };

πŸŽ€ Members πŸŽ€

So here's the whole cast of characters β€” every single field, no skips, periodt:

  • parent β€” The parent device. The main character's parent, if you will. πŸ‘‘
  • regmap β€” The regmap used to access the registers given; the name of the device is used.
  • fwnode β€” (Optional) The firmware node. If not given, the fwnode of the parent is used. It inherits from its parent, relatable tbh.
  • label β€” (Optional) Descriptive name for the GPIO controller. If not given, the name of the device is used.
  • ngpio β€” (Optional) Number of GPIOs. Count 'em.
  • names β€” (Optional) Array of names for gpios. Everybody gets a name tag, slay.
  • reg_dat_base β€” (Optional) (in) register base address.
  • reg_set_base β€” (Optional) set register base address.
  • reg_clr_base β€” (Optional) clear register base address.
  • reg_dir_in_base β€” (Optional) in setting register base address.
  • reg_dir_out_base β€” (Optional) out setting register base address. Direction count: two. And they're mutually exclusive, iykyk.
  • reg_stride β€” (Optional) May be set if the registers (of the same type, dat, set, etc) are not consecutive.
  • ngpio_per_reg β€” (Optional) Number of GPIOs per register.
  • irq_domain β€” (Optional) IRQ domain if the controller is interrupt-capable.
  • fixed_direction_mask β€” (Optional) Bitmap representing the GPIO lines that make use of the fixed_direction_output list to enforce direction of the GPIO. If this is NULL and fixed_direction_output is defined, ALL GPIOs are assumed to be fixed direction (out or in). No cap, it commits to the bit.
  • fixed_direction_output β€” (Optional) Bitmap representing the fixed direction of the GPIO lines. Useful when there are GPIO lines with a fixed direction mixed together in the same register. So like, when they're all up in the same register and you gotta tell them apart.
  • regmap_irq_chip β€” (Optional) Pointer on an regmap_irq_chip structure. If set, a regmap-irq device will be created and the IRQ domain will be set accordingly.
  • regmap_irq_line β€” (Optional) The IRQ the device uses to signal interrupts.
  • regmap_irq_flags β€” (Optional) The IRQF_ flags to use for the interrupt.
  • reg_mask_xlate β€” (Optional) Translates base address and GPIO offset to a register/bitmask pair. If not given the default gpio_regmap_simple_xlate is used. The default just works, bestie.
  • init_valid_mask β€” (Optional) Routine to initialize valid_mask, to be used if not all GPIOs are valid.
  • value_xlate β€” (Optional) Routine to translate the register value and mask before writing. This allows driver-specific logic to append additional bits (like write-enable masks) dynamically based on the current operation (GPIO_REGMAP_SET_OP and GPIO_REGMAP_SET_DIR_OP). Fancy ✨.
  • set_config β€” (Optional) Callback for setting GPIO configuration such as debounce, drive strength, or other hardware specific settings.
  • drvdata β€” (Optional) Pointer to driver specific data which is not used by gpio-remap but is provided "as is" to the driver callback(s). It's giving plus-one energy.

πŸ’– Description πŸ’–

Okay so the ->reg_mask_xlate translates a given base address and GPIO offset to register and mask pair. The base address is one of the given register base addresses in this structure.

Although all register base addresses are marked as optional, there are several rules β€” and bestie, you gotta respect the rules:

  1. if you only have reg_dat_base set, then it is input-only.
  2. if you only have reg_set_base set, then it is output-only.
  3. if you have either reg_dir_in_base or reg_dir_out_base set, then you have to set both reg_dat_base and reg_set_base.
  4. if you have reg_set_base set, you may also set reg_clr_base to have two different registers for setting and clearing the output. This is also valid for the output-only case.
  5. reg_dir_in_base and reg_dir_out_base are exclusive; is there really hardware which has redundant registers? Genuinely asking. 😭
🚨 Note time, bestie: All base addresses may have the special value GPIO_REGMAP_ADDR_ZERO which forces the address to the value 0. Don't sleep on this.

πŸ¦‹ SEE ALSO πŸ¦‹

  • Kernel file ./include/linux/gpio/regmap.h
  • enum gpio_regmap_operation(9)

Go touch grass and read the kernel headers, bestie. This manual page lives in ./include/linux/gpio, dated October 2026, and this struct is a whole vibe. Stay slay, stay compiled. πŸ’…βœ¨

πŸ“¦ where this page comes from