STRUCT GDSC(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ‘‘ struct gdsc(9) πŸ‘‘

okay so bestie, welcome to the Kernel API Manual β€” yes, that Kernel API Manual β€” and today's main character is struct gdsc, which stands for Globally Distributed Switch Controller. that's the whole name, no notes. it's giving power-management royalty and honestly? iconic. πŸŽ€


✨ SYNOPSIS ✨

like, here's the whole vibe, character for character. do not touch the #defines, they are load-bearing:

struct gdsc {
    struct generic_pm_domain        pd;
    struct generic_pm_domain        *parent;
    struct regmap                   *regmap;
    unsigned int                    gdscr;
    unsigned int                    collapse_ctrl;
    unsigned int                    collapse_mask;
    unsigned int                    gds_hw_ctrl;
    unsigned int                    clamp_io_ctrl;
    unsigned int                    *cxcs;
    unsigned int                    cxc_count;
    unsigned int                    en_rest_wait_val;
    unsigned int                    en_few_wait_val;
    unsigned int                    clk_dis_wait_val;
    const u8                        pwrsts;
  #define PWRSTS_OFF              BIT(0);
  #define PWRSTS_RET              BIT(1);
  #define PWRSTS_ON               BIT(2);
  #define PWRSTS_OFF_ON           (PWRSTS_OFF | PWRSTS_ON);
  #define PWRSTS_RET_ON           (PWRSTS_RET | PWRSTS_ON);
    const u16                       flags;
  #define VOTABLE         BIT(0);
  #define CLAMP_IO        BIT(1);
  #define HW_CTRL         BIT(2);
  #define SW_RESET        BIT(3);
  #define AON_RESET       BIT(4);
  #define POLL_CFG_GDSCR  BIT(5);
  #define ALWAYS_ON       BIT(6);
  #define RETAIN_FF_ENABLE        BIT(7);
  #define NO_RET_PERIPH   BIT(8);
  #define HW_CTRL_TRIGGER BIT(9);
    struct reset_controller_dev     *rcdev;
    unsigned int                    *resets;
    unsigned int                    reset_count;
    const char                      *supply;
    struct regulator                *rsupply;
    bool needs_icc;
    unsigned int                    icc_path_index;
    struct icc_path                 *icc_path;
};

πŸ’… Members πŸ’…

bestie these are the fields, and every single one of them matters, okay? no skipping:

  • pd β€” the generic power domain. it's the whole personality of the struct, lowkey.
  • regmap β€” the regmap for MMIO accesses. that's how we vibe with the hardware. πŸ’œ
  • gdscr β€” the gsdc control register. (yes, spelled gsdc right there in the register description. we're just the messenger 🫢)
  • collapse_ctrl β€” the APCS collapse-vote register.
  • collapse_mask β€” the APCS collapse-vote mask. it masks the vote. that's the whole job.
  • gds_hw_ctrl β€” the gds_hw_ctrl register. name literally says it all ngl.
  • cxcs β€” offsets of branch registers to toggle mem/periph bits in.
  • cxc_count β€” number of cxcs. bestie counts her offsets. ✨
  • en_rest_wait_val β€” transition delay value for receiving enr ack signal.
  • en_few_wait_val β€” transition delay value for receiving enf ack signal.
  • clk_dis_wait_val β€” transition delay value for halting clock.
  • pwrsts β€” possible powerdomain power states. (see all the PWRSTS_* bits up there ⬆️)
  • rcdev β€” the reset controller.
  • resets β€” ids of resets associated with this gdsc.
  • reset_count β€” number of resets.
ngl the synopsis has a few more fields than the Members list spells out β€” parent, clamp_io_ctrl, supply, rsupply, needs_icc, icc_path_index, icc_path β€” and no, I'm not gonna gaslight you about it. the struct is the struct. 🌸

🌈 SEE ALSO 🌈

  • the Kernel file ./drivers/clk/qcom/gdsc.h β€” go read it, iykyk πŸ”₯

okay that's the page!! tysm for reading all the way through, you ate that fr fr πŸ’– this drop comes straight from ./drivers/clk/qcom, dated October 2026 β€” so go forth, reference struct gdsc(9) responsibly, and remember: power domains are temporary, slay is forever. πŸ¦‹βœ¨

πŸ“¦ where this page comes from