STRUCT GDSC(9)
π struct gdsc(9) π
okay so bestie, welcome to the Kernel API Manual β yes, that Kernel API Manual β and today's main character is struct gdsc, which stands for Globally Distributed Switch Controller. that's the whole name, no notes. it's giving power-management royalty and honestly? iconic. π
β¨ SYNOPSIS β¨
like, here's the whole vibe, character for character. do not touch the #defines, they are load-bearing:
struct gdsc {
struct generic_pm_domain pd;
struct generic_pm_domain *parent;
struct regmap *regmap;
unsigned int gdscr;
unsigned int collapse_ctrl;
unsigned int collapse_mask;
unsigned int gds_hw_ctrl;
unsigned int clamp_io_ctrl;
unsigned int *cxcs;
unsigned int cxc_count;
unsigned int en_rest_wait_val;
unsigned int en_few_wait_val;
unsigned int clk_dis_wait_val;
const u8 pwrsts;
#define PWRSTS_OFF BIT(0);
#define PWRSTS_RET BIT(1);
#define PWRSTS_ON BIT(2);
#define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON);
#define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON);
const u16 flags;
#define VOTABLE BIT(0);
#define CLAMP_IO BIT(1);
#define HW_CTRL BIT(2);
#define SW_RESET BIT(3);
#define AON_RESET BIT(4);
#define POLL_CFG_GDSCR BIT(5);
#define ALWAYS_ON BIT(6);
#define RETAIN_FF_ENABLE BIT(7);
#define NO_RET_PERIPH BIT(8);
#define HW_CTRL_TRIGGER BIT(9);
struct reset_controller_dev *rcdev;
unsigned int *resets;
unsigned int reset_count;
const char *supply;
struct regulator *rsupply;
bool needs_icc;
unsigned int icc_path_index;
struct icc_path *icc_path;
};
π Members π
bestie these are the fields, and every single one of them matters, okay? no skipping:
pdβ the generic power domain. it's the whole personality of the struct, lowkey.regmapβ the regmap for MMIO accesses. that's how we vibe with the hardware. πgdscrβ thegsdccontrol register. (yes, spelledgsdcright there in the register description. we're just the messenger π«Ά)collapse_ctrlβ the APCS collapse-vote register.collapse_maskβ the APCS collapse-vote mask. it masks the vote. that's the whole job.gds_hw_ctrlβ thegds_hw_ctrlregister. name literally says it all ngl.cxcsβ offsets of branch registers to toggle mem/periph bits in.cxc_countβ number ofcxcs. bestie counts her offsets. β¨en_rest_wait_valβ transition delay value for receivingenrack signal.en_few_wait_valβ transition delay value for receivingenfack signal.clk_dis_wait_valβ transition delay value for halting clock.pwrstsβ possible powerdomain power states. (see all thePWRSTS_*bits up there β¬οΈ)rcdevβ the reset controller.resetsβ ids of resets associated with this gdsc.reset_countβ number of resets.
ngl the synopsis has a few more fields than the Members list spells out βparent,clamp_io_ctrl,supply,rsupply,needs_icc,icc_path_index,icc_pathβ and no, I'm not gonna gaslight you about it. the struct is the struct. πΈ
π SEE ALSO π
- the Kernel file
./drivers/clk/qcom/gdsc.hβ go read it, iykyk π₯
okay that's the page!! tysm for reading all the way through, you ate that fr fr π this drop comes straight from ./drivers/clk/qcom, dated October 2026 β so go forth, reference struct gdsc(9) responsibly, and remember: power domains are temporary, slay is forever. π¦β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms