STRUCT EXYNOS_CPUCLK_REGS(9)

🌸 NAME 🌸

okay so bestie, welcome to the Kernel API Manual 💖 — the main character today is struct exynos_cpuclk_regs(9), and it is literally all about Register offsets for CPU related clocks ✨. no cap, that’s the whole vibe.

🦋 SYNOPSIS 🦋

here’s the struct in all its glory, copied exactly because we do not play about details 🫶:

       struct exynos_cpuclk_regs {
           u32 mux_sel;
           u32 mux_stat;
           u32 div_cpu0;
           u32 div_cpu1;
           u32 div_stat_cpu0;
           u32 div_stat_cpu1;
           u32 mux;
           u32 divs[4];
        };

🎀 Members 🎀

• mux_sel — offset of CPU MUX_SEL register (for selecting MUX clock parent) 💅
• mux_stat — offset of CPU MUX_STAT register (for checking MUX clock status) 👀
• div_cpu0 — offset of CPU DIV0 register (for modifying divider values) ✨
• div_cpu1 — offset of CPU DIV1 register (for modifying divider values) 💚
• div_stat_cpu0 — offset of CPU DIV0_STAT register (for checking DIV status) 😭
• div_stat_cpu1 — offset of CPU DIV1_STAT register (for checking DIV status) 🍑
• mux — offset of MUX register for choosing CPU clock source 🎀
• divs — offsets of DIV registers (ACLK, ATCLK, PCLKDBG and PERIPHCLK) 🫶

⭐ SEE ALSO ⭐

• Kernel file ./drivers/clk/samsung/clk-cpu.c struct exynos_cpuclk_chip(9), struct exynos_cpuclk(9) — go peek at these too bestie, iykyk 🔥

okay that’s the page, mwah 💋 — this cutie comes from ./drivers/clk/samsung, dated October 2026, and the page tag is struct exynos_cpuclk_regs(9). periodt. 👑✨