STRUCT DWC2_QH(9)
π struct dwc2_qh(9) β Software queue head structure π
Okay bestie, welcome to the Kernel API Manual page for struct dwc2_qh, aka the software queue head structure. Itβs giving iconic kernel-struct energy, and weβre going through every field together β no skips, no cap. π«Ά
β¨ NAME β¨
struct dwc2_qh β Software queue head structure. Literally that. π
πΈ SYNOPSIS πΈ
struct dwc2_qh {
struct dwc2_hsotg *hsotg;
u8 ep_type;
u8 ep_is_in;
u16 maxp;
u16 maxp_mult;
u8 dev_speed;
u8 data_toggle;
u8 ping_state;
u8 do_split;
u8 td_first;
u8 td_last;
u16 host_us;
u16 device_us;
u16 host_interval;
u16 device_interval;
u16 next_active_frame;
u16 start_active_frame;
s16 num_hs_transfers;
struct dwc2_hs_transfer_time hs_transfers[DWC2_HS_SCHEDULE_UFRAMES];
u32 ls_start_schedule_slice;
u16 ntd;
u8 *dw_align_buf;
dma_addr_t dw_align_buf_dma;
struct list_head qtd_list;
struct dwc2_host_chan *channel;
struct list_head qh_list_entry;
struct dwc2_dma_desc *desc_list;
dma_addr_t desc_list_dma;
u32 desc_list_sz;
u32 *n_bytes;
struct timer_list unreserve_timer;
struct hrtimer wait_timer;
struct dwc2_tt *dwc_tt;
int ttport;
unsigned tt_buffer_dirty:1;
unsigned unreserve_pending:1;
unsigned schedule_low_speed:1;
unsigned want_wait:1;
unsigned wait_timer_cancel:1;
};
π¦ Members π¦
hsotgβ The HCD state structure for the DWC OTG controller. Thatβs the big-picture controller state, bestie. πep_typeβ Endpoint type. One of the following values:USB_ENDPOINT_XFER_CONTROLUSB_ENDPOINT_XFER_BULKUSB_ENDPOINT_XFER_INTUSB_ENDPOINT_XFER_ISOC
ep_is_inβ Endpoint direction. Which way the data vibes are flowing. π«maxpβ Value fromwMaxPacketSizefield of Endpoint Descriptor. The packet-size lore, straight from the descriptor.maxp_multβ Multiplier formaxp. Itβs giving βpacket size but make it multiplied.β β¨dev_speedβ Device speed. One of the following values:USB_SPEED_LOWUSB_SPEED_FULLUSB_SPEED_HIGH
data_toggleβ Determines the PID of the next data packet for non-control transfers. Ignored for control transfers. One of the following values:DWC2_HC_PID_DATA0DWC2_HC_PID_DATA1
ping_stateβ Ping state. Thatβs the whole note. Ping. State. ποΈdo_splitβ Full/low speed endpoint on high-speed hub requires split. A whole little βyes bestie, split neededβ flag.td_firstβ Index of first activated isochronous transfer descriptor.td_lastβ Index of last activated isochronous transfer descriptor.host_usβ Bandwidth in microseconds per transfer as seen by host.device_usβ Bandwidth in microseconds per transfer as seen by device.host_intervalβ Interval between transfers as seen by the host. If the host is high speed and the device is low speed this will be8times device interval.device_intervalβ Interval between transfers as seen by the device. interval.next_active_frameβ(Micro)framebefore we next need to put something on the bus. Weβll move theqhto active here. If the host is in high speed mode this will be auframe. If the host is in low speed mode this will be a full frame. π°οΈstart_active_frameβ If we are partway through a split transfer, this will be whatnext_active_framewas when we started. Otherwise it should always be the same asnext_active_frame.num_hs_transfersβ Number of transfers inhs_transfers. Normally this is1but can be more than one for splits. Always>= 1unless the host is in low/full speed mode.hs_transfersβ Transfers that are scheduled as seen by the high speed bus. Not used if host is in low or full speed mode (but note that it IS USED if the device is low or full speed as long as the HOST is in high speed mode). π₯ls_start_schedule_sliceβ Start time (in slices) on the low speed bus schedule thatβs being used by this device. This will be on theperiodic_bitmapin astruct dwc2_tt. Not used if this device is high speed. Note that this is inschedule slicewhich is tightly packed.ntdβ Actual number of transfer descriptors in a list.dw_align_bufβ Used instead of original buffer if its physical address is not dword-aligned.dw_align_buf_dmaβ DMA address fordw_align_buf.qtd_listβ List of QTDs for this QH.channelβ Host channel currently processing transfers for this QH.qh_list_entryβ Entry for QH in either the periodic or non-periodic schedule.desc_listβ List of transfer descriptors.desc_list_dmaβ Physical address ofdesc_list.desc_list_szβ Size of descriptors list.n_bytesβ Xfer Bytes array. Each element corresponds to a transfer descriptor and indicates originalXferSizevalue for the descriptor.unreserve_timerβ Timer for releasing periodic reservation.wait_timerβ Timer used to wait before re-queuing.dwc_ttβ Pointer to our tt info (orNULLif no tt).ttportβ Port number within our tt. (tt_buffer_dirtyβ True ifclear_tt_buffer_completeis pending.)tt_buffer_dirtyβ True if EPβs TT buffer is not clean. A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint. A QH structure may be entered in either the non-periodic or periodic schedule.unreserve_pendingβ True if we planned to unreserve but havenβt yet.schedule_low_speedβ True if we have a low/full speed component (either the host is in low/full speed mode ordo_split).want_waitβ We should wait before re-queuing; only matters for non-periodic transfers and is ignored for periodic ones.wait_timer_cancelβ Set totrueto cancel thewait_timer.
π SEE ALSO π
Kernel file ./drivers/usb/dwc2/hcd.h:
struct dwc2_host_chan(9)struct dwc2_tt(9)struct dwc2_hs_transfer_time(9)struct dwc2_qtd(9)dwc2_handle_hcd_intr(9)dwc2_hcd_stop(9)dwc2_hcd_is_b_host(9)dwc2_hcd_dump_state(9)
Thatβs the whole page, bestie π«Ά. Cute sign-off time: source/version is ./drivers/usb/dwc2, the date is October 2026, and this iconic little page is struct dwc2_qh(9). Periodt. π
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π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms