STRUCT DWC2_HW_PARAMS(9)

okay so bestie, welcome to the Kernel API Manual — this is the struct dwc2_hw_params(9) page, and it is literally all about the autodetected parameters, no cap ✨💖

---

💖 NAME 💖

struct dwc2_hw_params — the autodetected parameters, and yes that's the whole vibe 🫶

---

✨ SYNOPSIS ✨

here's the struct in all its glory, bestie — copy it exactly, character for character 💅

struct dwc2_hw_params {
    unsigned op_mode:3;
    unsigned arch:2;
    unsigned dma_desc_enable:1;
    unsigned enable_dynamic_fifo:1;
    unsigned en_multiple_tx_fifo:1;
    unsigned rx_fifo_size:16;
    unsigned host_nperio_tx_fifo_size:16;
    unsigned dev_nperio_tx_fifo_size:16;
    unsigned host_perio_tx_fifo_size:16;
    unsigned nperio_tx_q_depth:3;
    unsigned host_perio_tx_q_depth:3;
    unsigned dev_token_q_depth:5;
    unsigned max_transfer_size:26;
    unsigned max_packet_count:11;
    unsigned host_channels:5;
    unsigned hs_phy_type:2;
    unsigned fs_phy_type:2;
    unsigned i2c_enable:1;
    unsigned acg_enable:1;
    unsigned num_dev_ep:4;
    unsigned num_dev_in_eps : 4;
    unsigned num_dev_perio_in_ep:4;
    unsigned total_fifo_size:16;
    unsigned power_optimized:1;
    unsigned hibernation:1;
    unsigned utmi_phy_data_width:2;
    unsigned lpm_mode:1;
    unsigned ipg_isoc_en:1;
    unsigned service_interval_mode:1;
    u32 snpsid;
    u32 dev_ep_dirs;
    u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
};

---

🦋 Members 🦋

• op_mode — Mode of Operation: 0 — HNP- and SRP-Capable OTG (Host & Device); 1 — SRP-Capable OTG (Host & Device); 2 — Non-HNP and Non-SRP Capable OTG (Host & Device); 3 — SRP-Capable Device; 4 — Non-OTG Device; 5 — SRP-Capable Host; 6 — Non-OTG Host 👑
• arch — Architecture: 0 — Slave only; 1 — External DMA; 2 — Internal DMA ✨
• dma_desc_enable — when DMA mode is enabled, this specifies whether to use address DMA mode or descriptor DMA mode for accessing the data FIFOs. The driver will automatically detect the value for this if none is specified. 0 — Address DMA; 1 — Descriptor DMA (default, if available) 💫
• enable_dynamic_fifo — 0 — Use coreConsultant-specified FIFO size parameters; 1 — Allow dynamic FIFO sizing (default, if available) 🎀
• en_multiple_tx_fifo — specifies whether dedicated per-endpoint transmit FIFOs are enabled for non-periodic IN endpoints in device mode 🫶
• rx_fifo_size — number of 4-byte words in the Rx FIFO when dynamic FIFO sizing is enabled, 16 to 32768. Actual maximum value is autodetected and also the default 🌸
• host_nperio_tx_fifo_size — number of 4-byte words in the non-periodic Tx FIFO in host mode when dynamic FIFO sizing is enabled, 16 to 32768. Actual maximum value is autodetected and also the default 💖
• dev_nperio_tx_fifo_size — number of 4-byte words in the non-periodic Tx FIFO in device mode when dynamic FIFO sizing is enabled, 16 to 32768. Actual maximum value is autodetected and also the default 🦋
• host_perio_tx_fifo_size — number of 4-byte words in the periodic Tx FIFO in host mode when dynamic FIFO sizing is enabled, 16 to 32768. Actual maximum value is autodetected and also the default 🌈
• nperio_tx_q_depth — Non-Periodic Request Queue Depth: 2, 4 or 8 ⭐
• host_perio_tx_q_depth — Host Mode Periodic Request Queue Depth: 2, 4 or 8 ⭐
• dev_token_q_depth — Device Mode IN Token Sequence Learning Queue Depth: 0 to 30 🧚
• max_transfer_size — the maximum transfer size supported, in bytes, 2047 to 65,535. Actual maximum value is autodetected and also the default 🔥
• max_packet_count — the maximum number of packets in a transfer, 15 to 511. Actual maximum value is autodetected and also the default 💜
• host_channels — the number of host channel registers to use, 1 to 16. Actual maximum value is autodetected and also the default 👑
• hs_phy_type — High-speed PHY interface type: 0 — High-speed interface not supported; 1 — UTMI+; 2 — ULPI; 3 — UTMI+ and ULPI ✨
• fs_phy_type — Full-speed PHY interface type: 0 — Full speed interface not supported; 1 — Dedicated full speed interface; 2 — FS pins shared with UTMI+ pins; 3 — FS pins shared with ULPI pins 🌸
• i2c_enable — specifies whether to use the I2Cinterface for a full speed PHY. This parameter is only applicable if phy_type is FS. 0 — No (default); 1 — Yes 🎀
• acg_enable — for enabling Active Clock Gating in the controller: 0 — Disable; 1 — Enable 💫
• num_dev_ep — number of device endpoints available 🫶
• num_dev_in_eps — number of device IN endpoints available 🫶
• num_dev_perio_in_ep — number of device periodic IN endpoints available 🫶
• total_fifo_size — total internal RAM for FIFOs (bytes) 🌸
• power_optimized — are power optimizations enabled? ⚡
• hibernation — is hibernation enabled? 😴
• utmi_phy_data_width — UTMI+ PHY data width: 0 — 8 bits; 1 — 16 bits; 2 — 8 or 16 bits 🌈
• lpm_mode — for enabling Link Power Management in the controller: 0 — Disable; 1 — Enable 💜
• ipg_isoc_en — this feature indicates that the controller supports the worst-case scenario of Rx followed by Rx Interpacket Gap (IPG) (32 bitTimes) as per the utmi specification for any token following ISOC OUT token. 0 — Don't support; 1 — Support 🔥
• service_interval_mode — for enabling service interval based scheduling in the controller. 0 — Disable; 1 — Enable ⭐
• snpsid — value from SNPSID register 🎀
• dev_ep_dirs — direction of device endpoints (GHWCFG1) 🦋
• g_tx_fifo_size — power-on values of TxFIFO sizes 💖

---

🌈 Description 🌈

these parameters are the various parameters read from hardware registers during initialization. They typically contain the best supported or maximum value that can be configured in the corresponding dwc2_core_params value 💅

the values that are not in dwc2_core_params are documented below 🫶

---

💜 SEE ALSO 💜

• Kernel file ./drivers/usb/dwc2/core.h
• struct dwc2_hsotg_ep(9)
• struct dwc2_hsotg_req(9)
• struct dwc2_core_params(9)
• struct dwc2_gregs_backup(9)
• struct dwc2_dregs_backup(9)
• struct dwc2_hregs_backup(9)
• struct dwc2_hsotg(9)

---

mwah 💋 this little love letter lives in ./drivers/usb/dwc2, dated October 2026, and it's the struct dwc2_hw_params(9) page — bye bestie, go read some hardware registers for me 🎀✨periodt