STRUCT DWC2_HOST_CHAN(9)
π NAME π
struct dwc2_host_chan β Software host channel descriptor π
okay bestie, welcome to the struct dwc2_host_chan(9) page from the Kernel API Manual. This is literally the software host channel descriptor β the struct that keeps a single host channelβs whole vibe together. π«Ά
β¨ SYNOPSIS β¨
struct dwc2_host_chan {
u8 hc_num;
unsigned dev_addr:7;
unsigned ep_num:4;
unsigned ep_is_in:1;
unsigned speed:4;
unsigned ep_type:2;
unsigned max_packet:11;
unsigned data_pid_start:2;
#define DWC2_HC_PID_DATA0 TSIZ_SC_MC_PID_DATA0;
#define DWC2_HC_PID_DATA2 TSIZ_SC_MC_PID_DATA2;
#define DWC2_HC_PID_DATA1 TSIZ_SC_MC_PID_DATA1;
#define DWC2_HC_PID_MDATA TSIZ_SC_MC_PID_MDATA;
#define DWC2_HC_PID_SETUP TSIZ_SC_MC_PID_SETUP;
unsigned multi_count:2;
u8 *xfer_buf;
dma_addr_t xfer_dma;
dma_addr_t align_buf;
u32 xfer_len;
u32 xfer_count;
u16 start_pkt_count;
u8 xfer_started;
u8 do_ping;
u8 error_state;
u8 halt_on_queue;
u8 halt_pending;
u8 do_split;
u8 complete_split;
u8 hub_addr;
u8 hub_port;
u8 xact_pos;
#define DWC2_HCSPLT_XACTPOS_MID HCSPLT_XACTPOS_MID;
#define DWC2_HCSPLT_XACTPOS_END HCSPLT_XACTPOS_END;
#define DWC2_HCSPLT_XACTPOS_BEGIN HCSPLT_XACTPOS_BEGIN;
#define DWC2_HCSPLT_XACTPOS_ALL HCSPLT_XACTPOS_ALL;
u8 requests;
u8 schinfo;
u16 ntd;
enum dwc2_halt_status halt_status;
u32 hcint;
struct dwc2_qh *qh;
struct list_head hc_list_entry;
dma_addr_t desc_list_addr;
u32 desc_list_sz;
struct list_head split_order_list_entry;
};
π Members π
Hereβs the member-by-member breakdown, no skipping, periodt:
hc_numβ Host channel number, used for register address lookup. πdev_addrβ Address of the device.ep_numβ Endpoint of the device.ep_is_inβ Endpoint direction.speedβ Device speed. One of the following values:USB_SPEED_LOWUSB_SPEED_FULLUSB_SPEED_HIGH
ep_typeβ Endpoint type. One of the following values:USB_ENDPOINT_XFER_CONTROL: 0USB_ENDPOINT_XFER_ISOC: 1USB_ENDPOINT_XFER_BULK: 2USB_ENDPOINT_XFER_INTR: 3
max_packetβ Max packet size in bytes.data_pid_startβ PID for initial transaction.0:DATA0,1:DATA2,2:DATA1,3:MDATA(non-Control EP),SETUP(Control EP).multi_countβ Number of additional periodic transactions per (micro)frame.xfer_bufβ Pointer to current transfer buffer position.xfer_dmaβ DMA address ofxfer_buf.align_bufβ In Buffer DMA mode this will be used ifxfer_bufis not DWORD aligned.xfer_lenβ Total number of bytes to transfer.xfer_countβ Number of bytes transferred so far.start_pkt_countβ Packet count at start of transfer.xfer_startedβ True if the transfer has been started.do_pingβ True if a PING request should be issued on this channel.error_stateβ True if the error count for this transaction is non-zero.halt_on_queueβ True if this channel should be halted the next time a request is queued for the channel. This is necessary in slave mode if no request queue space is available when an attempt is made to halt the channel.halt_pendingβ True if the host channel has been halted, but the core is not finished flushing queued requests.do_splitβ Enable split for the channel.complete_splitβ Enable complete split.hub_addrβ Address of high speed hub for the split.hub_portβ Port of the low/full speed device for the split.xact_posβ Split transaction position. One of the following values:DWC2_HCSPLT_XACTPOS_MIDDWC2_HCSPLT_XACTPOS_BEGINDWC2_HCSPLT_XACTPOS_ENDDWC2_HCSPLT_XACTPOS_ALL
requestsβ Number of requests issued for this channel since it was assigned to the current transfer (not counting PINGs).schinfoβ Scheduling micro-frame bitmap.ntdβ Number of transfer descriptors for the transfer.halt_statusβ Reason for halting the host channel.hcintβ Contents of the HCINT register when the interrupt came.qhβ QH for the transfer being processed by this channel.hc_list_entryβ For linking to list of host channels.desc_list_addrβ Current QHβs descriptor list DMA address.desc_list_szβ Current QHβs descriptor list size.split_order_list_entryβ List entry for keeping track of the order of splits.
π Description π
This structure represents the state of a single host channel when acting in host mode. It contains the data items needed to transfer packets to an endpoint via a host channel. Iconic little state blob, honestly. β¨
π¦ SEE ALSO π¦
- Kernel file
./drivers/usb/dwc2/hcd.h struct dwc2_tt(9)struct dwc2_hs_transfer_time(9)struct dwc2_qh(9)struct dwc2_qtd(9)dwc2_handle_hcd_intr(9)dwc2_hcd_stop(9)dwc2_hcd_is_b_host(9)dwc2_hcd_dump_state(9)
k bye bestie β this page comes from ./drivers/usb/dwc2, dated October 2026, and itβs the struct dwc2_host_chan(9) manual. slay and read the source πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms