STRUCT DW_I2C_DEV(9)
π struct dw_i2c_dev(9) β like, the Kernel API Manual, bestie β¨
okay so picture this: it's struct dw_i2c_dev, and it's the private i2c-designware data. private!! as in, not for just anybody. main character energy only π (this is from the struct dw_i2c_dev(9) page of the Kernel API Manual, iykyk)
β¨ SYNOPSIS β¨
no cap, here's the whole thing, character for character, don't @ me:
struct dw_i2c_dev {
struct device *dev;
struct regmap *map;
struct regmap *sysmap;
void __iomem *base;
void __iomem *ext;
struct completion cmd_complete;
struct clk *clk;
struct clk *pclk;
struct reset_control *rst;
struct i2c_client *slave;
u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
int cmd_err;
struct i2c_msg *msgs;
int msgs_num;
int msg_write_idx;
u32 tx_buf_len;
u8 *tx_buf;
int msg_read_idx;
u32 rx_buf_len;
u8 *rx_buf;
int msg_err;
unsigned int status;
unsigned int abort_source;
unsigned int sw_mask;
int irq;
u32 flags;
struct i2c_adapter adapter;
u32 functionality;
u32 master_cfg;
u32 slave_cfg;
unsigned int tx_fifo_depth;
unsigned int rx_fifo_depth;
int rx_outstanding;
struct i2c_timings timings;
u32 sda_hold_time;
u16 ss_hcnt;
u16 ss_lcnt;
u16 fs_hcnt;
u16 fs_lcnt;
u16 fp_hcnt;
u16 fp_lcnt;
u16 hs_hcnt;
u16 hs_lcnt;
int (*acquire_lock)(void);
void (*release_lock)(void);
int semaphore_idx;
bool shared_with_punit;
int (*set_sda_hold_time)(struct dw_i2c_dev *dev);
int mode;
struct i2c_bus_recovery_info rinfo;
u32 bus_capacitance_pF;
bool clk_freq_optimized;
bool emptyfifo_hold_master;
};
bestie it's 55 fields long and every single one is getting her moment π
πΈ MEMBERS πΈ
okay so now we go through them one by one, no skipping, no speedrunning, we love an exhaustive queen π«Ά
devβ the driver model device node. iconic.mapβ the IO registers map, fr.sysmapβ System controller registers map. separate map, separate vibe.baseβ the IO registers pointer.extβ the Extended IO registers pointer π₯cmd_completeβ tx completion indicator. she'll tell you when tx is done, and you will listen.clkβ the input reference clock β°pclkβ the clock required to access the registers. not optional, she's the bouncer for your register reads.rstβ optional reset for the controller. optional, so don't come for me.slaveβ represent an I2C slave device. lowercase slave, capital respect.get_clk_rate_khzβ callback to retrieve IP specific bus speed. a whole function pointer, she works for a living πcmd_errβ run time hardware error code. hardware said no πmsgsβ points to an array of messages currently being transferred.msgs_numβ the number of elements inmsgs. yes, it's the count of the thing above, we love support systems.msg_write_idxβ the element index of the current tx message in themsgsarray.tx_buf_lenβ the length of the current tx buffer.tx_bufβ the current tx buffer.msg_read_idxβ the element index of the current rx message in themsgsarray.rx_buf_lenβ the length of the current rx buffer.rx_bufβ the current rx buffer.msg_errβ error status of the current transfer. current! transfer! specific!statusβ i2c master status, one ofSTATUS_*. literally whichSTATUS_*? one of them. mystery. drama. β¨abort_sourceβ copy of theTX_ABRT_SOURCEregister.sw_maskβ SW mask ofDW_IC_INTR_MASKused in polling mode.irqβ interrupt number for the i2c master.flagsβ platform specific flags like type of IO accessors or model. the personality field, lowkey.adapterβ i2c subsystem adapter node.functionalityβI2C_FUNC_*ORed bits to reflect what controller does support. it's giving rΓ©sumΓ© of the controller.master_cfgβ configuration for the master device.slave_cfgβ configuration for the slave device.tx_fifo_depthβ depth of the hardware tx fifo.rx_fifo_depthβ depth of the hardware rx fifo. symmetric queen πrx_outstandingβ current master-rx elements in tx fifo. (yes, rx elements sitting in the tx fifo. that's the whole point, don't overthink it.)timingsβ bus clock frequency, SDA hold and other timings β±οΈsda_hold_timeβ SDA hold value.ss_hcntβ standard speed HCNT value.ss_lcntβ standard speed LCNT value.fs_hcntβ fast speed HCNT value.fs_lcntβ fast speed LCNT value.fp_hcntβ fast plus HCNT value.fp_lcntβ fast plus LCNT value.hs_hcntβ high speed HCNT value.hs_lcntβ high speed LCNT value.acquire_lockβ function to acquire a hardware lock on the bus πrelease_lockβ function to release a hardware lock on the bus π (the way these two are always a matched set, obsessed)semaphore_idxβ Index of table with semaphore type attached to the bus. It's-1if there is no semaphore.-1!! she's telling you there's no semaphore, respectfully.shared_with_punitβ true if this bus is shared with the SoC's PUNIT.set_sda_hold_timeβ callback to retrieve IP specific SDA hold timing. another callback, we stan a callback-heavy struct πmodeβ operation mode βDW_IC_MASTERorDW_IC_SLAVE. pick a lane.rinfoβ IΒ²C GPIO recovery information. yes with the superscript Β², we're fancy.bus_capacitance_pFβ bus capacitance in picofarads. picofarads!! that's so small!! π¦clk_freq_optimizedβ if this value is true, it means the hardware reduces its internal clock frequency by reducing the internal latency required to generate the high period and low period of SCL line. (read that twice, it's a real sentence with real meaning.)emptyfifo_hold_masterβ true if the controller acting as master holds the clock when the Tx FIFO is empty instead of emitting a stop. instead of!! emitting!! a stop!!
π DESCRIPTION π
so here's the tea: HCNT and LCNT parameters can be used if the platform knows more accurate values than the one computed based only on the input clock frequency.
and β this is the important bit β leave them to be 0 if not used. 0 means "not used", okay? don't be out here putting random numbers, I'm begging π
π₯ SEE ALSO π₯
- Kernel file
./drivers/i2c/busses/i2c-designware-core.hβ go read the source, bestie, it's right there π
and that's the page!! this came out of ./drivers/i2c/busses, dated October 2026 β so yeah, mark your calendar, screenshot it, frame it, slay π
β¨π
fr fr, go be iconic with your i2c-designware data π§π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms