STRUCT DW_I2C_DEV(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct dw_i2c_dev(9) β€” like, the Kernel API Manual, bestie ✨

okay so picture this: it's struct dw_i2c_dev, and it's the private i2c-designware data. private!! as in, not for just anybody. main character energy only πŸŽ€ (this is from the struct dw_i2c_dev(9) page of the Kernel API Manual, iykyk)


✨ SYNOPSIS ✨

no cap, here's the whole thing, character for character, don't @ me:

struct dw_i2c_dev {
    struct device           *dev;
    struct regmap           *map;
    struct regmap           *sysmap;
    void __iomem            *base;
    void __iomem            *ext;
    struct completion       cmd_complete;
    struct clk              *clk;
    struct clk              *pclk;
    struct reset_control    *rst;
    struct i2c_client       *slave;
    u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
    int cmd_err;
    struct i2c_msg          *msgs;
    int msgs_num;
    int msg_write_idx;
    u32 tx_buf_len;
    u8 *tx_buf;
    int msg_read_idx;
    u32 rx_buf_len;
    u8 *rx_buf;
    int msg_err;
    unsigned int            status;
    unsigned int            abort_source;
    unsigned int            sw_mask;
    int irq;
    u32 flags;
    struct i2c_adapter      adapter;
    u32 functionality;
    u32 master_cfg;
    u32 slave_cfg;
    unsigned int            tx_fifo_depth;
    unsigned int            rx_fifo_depth;
    int rx_outstanding;
    struct i2c_timings      timings;
    u32 sda_hold_time;
    u16 ss_hcnt;
    u16 ss_lcnt;
    u16 fs_hcnt;
    u16 fs_lcnt;
    u16 fp_hcnt;
    u16 fp_lcnt;
    u16 hs_hcnt;
    u16 hs_lcnt;
    int (*acquire_lock)(void);
    void (*release_lock)(void);
    int semaphore_idx;
    bool shared_with_punit;
    int (*set_sda_hold_time)(struct dw_i2c_dev *dev);
    int mode;
    struct i2c_bus_recovery_info rinfo;
    u32 bus_capacitance_pF;
    bool clk_freq_optimized;
    bool emptyfifo_hold_master;
};

bestie it's 55 fields long and every single one is getting her moment πŸ’–


🌸 MEMBERS 🌸

okay so now we go through them one by one, no skipping, no speedrunning, we love an exhaustive queen 🫢

  • dev β€” the driver model device node. iconic.
  • map β€” the IO registers map, fr.
  • sysmap β€” System controller registers map. separate map, separate vibe.
  • base β€” the IO registers pointer.
  • ext β€” the Extended IO registers pointer πŸ”₯
  • cmd_complete β€” tx completion indicator. she'll tell you when tx is done, and you will listen.
  • clk β€” the input reference clock ⏰
  • pclk β€” the clock required to access the registers. not optional, she's the bouncer for your register reads.
  • rst β€” optional reset for the controller. optional, so don't come for me.
  • slave β€” represent an I2C slave device. lowercase slave, capital respect.
  • get_clk_rate_khz β€” callback to retrieve IP specific bus speed. a whole function pointer, she works for a living πŸ’…
  • cmd_err β€” run time hardware error code. hardware said no 😭
  • msgs β€” points to an array of messages currently being transferred.
  • msgs_num β€” the number of elements in msgs. yes, it's the count of the thing above, we love support systems.
  • msg_write_idx β€” the element index of the current tx message in the msgs array.
  • tx_buf_len β€” the length of the current tx buffer.
  • tx_buf β€” the current tx buffer.
  • msg_read_idx β€” the element index of the current rx message in the msgs array.
  • rx_buf_len β€” the length of the current rx buffer.
  • rx_buf β€” the current rx buffer.
  • msg_err β€” error status of the current transfer. current! transfer! specific!
  • status β€” i2c master status, one of STATUS_*. literally which STATUS_*? one of them. mystery. drama. ✨
  • abort_source β€” copy of the TX_ABRT_SOURCE register.
  • sw_mask β€” SW mask of DW_IC_INTR_MASK used in polling mode.
  • irq β€” interrupt number for the i2c master.
  • flags β€” platform specific flags like type of IO accessors or model. the personality field, lowkey.
  • adapter β€” i2c subsystem adapter node.
  • functionality β€” I2C_FUNC_* ORed bits to reflect what controller does support. it's giving rΓ©sumΓ© of the controller.
  • master_cfg β€” configuration for the master device.
  • slave_cfg β€” configuration for the slave device.
  • tx_fifo_depth β€” depth of the hardware tx fifo.
  • rx_fifo_depth β€” depth of the hardware rx fifo. symmetric queen πŸŽ€
  • rx_outstanding β€” current master-rx elements in tx fifo. (yes, rx elements sitting in the tx fifo. that's the whole point, don't overthink it.)
  • timings β€” bus clock frequency, SDA hold and other timings ⏱️
  • sda_hold_time β€” SDA hold value.
  • ss_hcnt β€” standard speed HCNT value.
  • ss_lcnt β€” standard speed LCNT value.
  • fs_hcnt β€” fast speed HCNT value.
  • fs_lcnt β€” fast speed LCNT value.
  • fp_hcnt β€” fast plus HCNT value.
  • fp_lcnt β€” fast plus LCNT value.
  • hs_hcnt β€” high speed HCNT value.
  • hs_lcnt β€” high speed LCNT value.
  • acquire_lock β€” function to acquire a hardware lock on the bus πŸ”’
  • release_lock β€” function to release a hardware lock on the bus πŸ”“ (the way these two are always a matched set, obsessed)
  • semaphore_idx β€” Index of table with semaphore type attached to the bus. It's -1 if there is no semaphore. -1!! she's telling you there's no semaphore, respectfully.
  • shared_with_punit β€” true if this bus is shared with the SoC's PUNIT.
  • set_sda_hold_time β€” callback to retrieve IP specific SDA hold timing. another callback, we stan a callback-heavy struct πŸ’œ
  • mode β€” operation mode β€” DW_IC_MASTER or DW_IC_SLAVE. pick a lane.
  • rinfo β€” IΒ²C GPIO recovery information. yes with the superscript Β², we're fancy.
  • bus_capacitance_pF β€” bus capacitance in picofarads. picofarads!! that's so small!! πŸ¦‹
  • clk_freq_optimized β€” if this value is true, it means the hardware reduces its internal clock frequency by reducing the internal latency required to generate the high period and low period of SCL line. (read that twice, it's a real sentence with real meaning.)
  • emptyfifo_hold_master β€” true if the controller acting as master holds the clock when the Tx FIFO is empty instead of emitting a stop. instead of!! emitting!! a stop!!

πŸ’– DESCRIPTION πŸ’–

so here's the tea: HCNT and LCNT parameters can be used if the platform knows more accurate values than the one computed based only on the input clock frequency.

and β€” this is the important bit β€” leave them to be 0 if not used. 0 means "not used", okay? don't be out here putting random numbers, I'm begging πŸ™ˆ


πŸ”₯ SEE ALSO πŸ”₯

  • Kernel file ./drivers/i2c/busses/i2c-designware-core.h β€” go read the source, bestie, it's right there πŸ‘‘

and that's the page!! this came out of ./drivers/i2c/busses, dated October 2026 β€” so yeah, mark your calendar, screenshot it, frame it, slay πŸ’…βœ¨πŸŒˆ

fr fr, go be iconic with your i2c-designware data πŸ§šπŸ’œ

πŸ“¦ where this page comes from