STRUCT DW_DMA_PLATFORM_DATA(9)

💅 NAME 💅

struct dw_dma_platform_data — the controller configuration parameters bestie, that's literally the whole vibe ✨

okay so quick note before we dive in: this page lives in the Kernel API Manual, and it's all about this one struct that holds every knob your DW DMA controller cares about. buckle up 🎀

✨ SYNOPSIS ✨

here's the whole struct, no cap, every field exactly as it is:

struct dw_dma_platform_data {
    u32 nr_masters;
    u32 nr_channels;
  #define CHAN_ALLOCATION_ASCENDING       0       ;
  #define CHAN_ALLOCATION_DESCENDING      1       ;
    u32 chan_allocation_order;
  #define CHAN_PRIORITY_ASCENDING         0       ;
  #define CHAN_PRIORITY_DESCENDING        1       ;
    u32 chan_priority;
    u32 block_size;
    u32 data_width[DW_DMA_MAX_NR_MASTERS];
    u32 multi_block[DW_DMA_MAX_NR_CHANNELS];
    u32 max_burst[DW_DMA_MAX_NR_CHANNELS];
  #define CHAN_PROTCTL_PRIVILEGED         BIT(0);
  #define CHAN_PROTCTL_BUFFERABLE         BIT(1);
  #define CHAN_PROTCTL_CACHEABLE          BIT(2);
  #define CHAN_PROTCTL_MASK               GENMASK(2, 0);
    u32 protctl;
  #define DW_DMA_QUIRK_XBAR_PRESENT       BIT(0);
    u32 quirks;
 };

like, iconic. the #defines are just chillin' inside the struct body, that's the house style 💀

🫶 Members 🫶

let me walk you through each one, bestie, one at a time 🦋

• nr_masters — how many AHB masters the controller supports. that's it, that's the number 👑
• nr_channels — how many channels the hardware actually supports (max 8, so don't get greedy ✋)
• chan_allocation_order — whether we allocate channels starting from 0 or from 7. fr fr, that's the whole choice 🌸
• chan_priority — sets the channel priority as increasing from 0 to 7, or from 7 to 0. pick your direction, gorl 💅
• block_size — the maximum block size the controller can handle 🎀
• data_width — the max data width the hardware supports per AHB master. units are bytes, and it's gotta be a power of 2, okurrr ✨
• multi_block — multi block transfers supported by hardware, per channel. one entry per channel, lowkey organized 🗂️
• max_burst — the maximum value of burst transaction size the hardware supports per channel, measured in units of CTL.SRC_TR_WIDTH/CTL.DST_TR_WIDTH. yes, exactly that, iykyk 🔥
• protctl — the protection control signals setting, per channel 🛡️
• quirks — optional platform quirks. the little extra-flavor bits 🙈

🌈 SEE ALSO 🌈

• the kernel file ./include/linux/platform_data/dma-dw.h — go read it, it's right there 📂
• struct dw_dma_slave(9) — the related struct, give it a vibe check too 🧚

and that's the page, bestie!! 🍓 this one came from ./include/linux/platform_data, dated October 2026, and it's literally the struct dw_dma_platform_data(9) page — 💜 mwah, go configure some controllers 💜