STRUCT DRM_I915_QUERY_TOPOLOGY_INFO(9)

💅 struct drm_i915_query_topology_info(9) — a Kernel API Manual page, bestie edition

okay so you found the page for struct drm_i915_query_topology_info and it's literally the glow-up guide for how i915 tells you what slices, subslices and EUs your GPU actually has. this is from the Kernel API Manual, section 9. no cap, it's a whole vibe. 🫶

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✨ SYNOPSIS ✨

here's the struct in all its glory — copy it exactly, don't touch a single character 💅

struct drm_i915_query_topology_info {
    __u16 flags;
    __u16 max_slices;
    __u16 max_subslices;
    __u16 max_eus_per_subslice;
    __u16 subslice_offset;
    __u16 subslice_stride;
    __u16 eu_offset;
    __u16 eu_stride;
    __u8 data[];
 };

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🎀 MEMBERS 🎀

time for the member-by-member vibe check, one bullet each, no skipping 👑

• flags — unused for now, so it must be cleared to zero. that's it, that's the whole job 🌸
• max_slices — how many bits are used to express the slice mask.
• max_subslices — how many bits are used to express the subslice mask.
• max_eus_per_subslice — how many bits in the EU mask correspond to a single subslice's EUs.
• subslice_offset — the offset in data[] where the subslice masks live.
• subslice_stride — the stride at which each of the subslice masks for each slice are stored.
• eu_offset — the offset in data[] where the EU masks live.
• eu_stride — the stride at which each of the EU masks for each subslice are stored.
• data — the main character tbh. it contains 3 pieces of information:
  • 🍓 the slice mask — one bit per slice, telling whether a slice is available. you can query the availability of slice X with this formula:

(data[X / 8] >> (X % 8)) & 1

heads up, bestie: starting with Xe_HP platforms, Intel hardware no longer has traditional slices, so i915 will always report a single slice (hardcoded slicemask = 0x1) which contains all of the platform's subslices. i.e. the mask here does not reflect any of the newer hardware concepts such as "gslices" or "cslices", since userspace is capable of inferring those from the subslice mask. 💀 don't go reading things into it that aren't there.

• 🦋 the subslice mask for each slice — one bit per subslice, telling whether a subslice is available. starting with Gen12 we use the term "subslice" to refer to what the hardware documentation describes as a "dual-subslices." the availability of subslice Y in slice X can be queried with this formula:

(data[subslice_offset + X * subslice_stride + Y / 8] >> (Y % 8)) & 1

• 🌈 the EU mask for each subslice in each slice — one bit per EU, telling whether an EU is available. the availability of EU Z in subslice Y in slice X can be queried with this formula:

(data[eu_offset + (X * max_subslices + Y) * eu_stride + Z / 8 ] >> (Z % 8)) & 1

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🧚 DESCRIPTION 🧚

this struct describes the slice/subslice/EU information that gets queried by DRM_I915_QUERY_TOPOLOGY_INFO. that's the whole point of it, iconic behavior honestly.

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🔥 SEE ALSO 🔥

the friend group. the whole squad. all of them, in order, go look them up iykyk:

• Kernel file ./tools/perf/trace/beauty/include/uapi/drm/i915_drm.h
• uevents generated by i915 on its device node(9)
• struct i915_user_extension(9)
• enum drm_i915_gem_engine_class(9)
• struct i915_engine_class_instance(9)
• perf_events exposed by i915 through /sys/bus/event_sources/drivers/i915(9)
• struct drm_i915_getparam(9)
• drm_i915_getparam_t(9)
• struct drm_i915_gem_mmap_offset(9)
• struct drm_i915_gem_set_domain(9)
• struct drm_i915_gem_exec_fence(9)
• struct drm_i915_gem_execbuffer_ext_timeline_fences(9)
• struct drm_i915_gem_execbuffer2(9)
• struct drm_i915_gem_caching(9)
• struct drm_i915_gem_context_create_ext(9)
• struct drm_i915_gem_context_param(9)
• Virtual Engine uAPI(9)
• struct i915_context_engines_parallel_submit(9)
• Context Engine Map uAPI(9)
• struct drm_i915_gem_context_create_ext_setparam(9)
• struct drm_i915_gem_vm_control(9)
• struct drm_i915_gem_userptr(9)
• struct drm_i915_perf_oa_config(9)
• struct drm_i915_query_item(9)
• struct drm_i915_query(9)
• Engine Discovery uAPI(9)
• struct drm_i915_engine_info(9)
• struct drm_i915_query_engine_info(9)
• struct drm_i915_query_perf_config(9)
• enum drm_i915_gem_memory_class(9)
• struct drm_i915_gem_memory_class_instance(9)
• struct drm_i915_memory_region_info(9)
• struct drm_i915_query_memory_regions(9)
• struct drm_i915_query_guc_submission_version(9)
• GuC HWCONFIG blob uAPI(9)
• struct drm_i915_gem_create_ext(9)
• struct drm_i915_gem_create_ext_memory_regions(9)
• struct drm_i915_gem_create_ext_protected_content(9)
• struct drm_i915_gem_create_ext_set_pat(9)

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okay that's the page!! this came from ./tools/perf/trace/beauty/incl... and it's dated October 2026 — yes bestie, a future date, she's ahead of her time 💜✨ go forth and query your topology, mwah 🎀💖